; ACL2 System+Books Combined XDOC Manual ; Copyright (C) 2008-2014 Centaur Technology ; ; Contact: ; Centaur Technology Formal Verification Group ; 7600-C N. Capital of Texas Highway, Suite 300, Austin, TX 78731, USA. ; http://www.centtech.com/ ; ; License: (An MIT/X11-style license) ; ; Permission is hereby granted, free of charge, to any person obtaining a ; copy of this software and associated documentation files (the "Software"), ; to deal in the Software without restriction, including without limitation ; the rights to use, copy, modify, merge, publish, distribute, sublicense, ; and/or sell copies of the Software, and to permit persons to whom the ; Software is furnished to do so, subject to the following conditions: ; ; The above copyright notice and this permission notice shall be included in ; all copies or substantial portions of the Software. ; ; THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR ; IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, ; FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE ; AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER ; LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING ; FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER ; DEALINGS IN THE SOFTWARE. ; ; Original author: Jared Davis (in-package "ACL2") (include-book "xdoc/top" :dir :system) (defsection math :parents (top) :short "Math-related libraries: arithmetic, algebra, bit-vectors.") (defsection algebra :parents (math) :short "Libraries to reason about algebraic structures, e.g. groups, rings, fields, polynomials.") (defsection arithmetic :parents (math) :short "Libraries for reasoning about basic arithmetic, bit-vector arithmetic, modular arithmetic, etc.") (defsection bit-vectors :parents (math) :short "Libraries for reasoning about bit vectors.") (defsection boolean-reasoning :parents (top) :short "Libraries related to representing and processing Boolean functions, geared toward large-scale automatic reasoning, e.g., via SAT solving and AIG or BDD packages." :long "

Introduction

Boolean functions are widely useful throughout mathematical logic, computer science, and computer engineering. In formal verification, they are especially interesting because many high-capacity, fully automatic techniques are known for analyzing, comparing, and simplifying them; for instance, see binary decision diagrams (bdds), SAT solvers, and-inverter graphs (aigs), model checking, equivalence checking, and so forth.

Libraries for Boolean Functions

We have developed some libraries for working with Boolean functions, for instance:

These libraries are important groundwork for the @(see gl) framework for bit-blasting ACL2 theorems, and may be of interest to anyone who is trying to develop new, automatic tools or proof techniques.

Libraries for Four-Valued Logic

Being able to process large-scale Boolean functions is especially important in @(see hardware-verification). But actually, here, to model certain circuits and to implement certain algorithms, it can be useful to go beyond Boolean functions and consider a richer logic.

You might call Boolean functions or Boolean logic a two-valued logic, since there are just two values (true and false) that any variable can take. It is often useful to add a third value, usually called X, to represent an \"unknown\" value. In some systems, a fourth value, Z, is added to represent an undriven wire. For more on this, see @(see why-4v-logic).

We have developed two libraries to support working in four-valued logic. Of these, the @(see 4v) library is somewhat higher level and is generally simpler and more convenient to work with. It serves as the basis of the @(see esim) hardware simulator. Meanwhile, the @(see faig) library is a bit lower-level and does not enjoy the very nice @(see 4v-monotonicity) property of @(see 4v-sexprs). On the other hand, @(see faig)s are closer to @(see aig)s, and can be useful for loading expressions into @(see aignet) or @(see satlink).

Related Papers

Besides the documentation here, you may find the following papers useful:

Jared Davis and Sol Swords. Verified AIG Algorithms in ACL2. In ACL2 Workshop 2013. May, 2013. EPTCS 114. Pages 95-110.

Sol Swords and Jared Davis. Bit-Blasting ACL2 Theorems. In ACL2 Workshop 2011. November, 2011. EPTCS 70. Pages 84-102.

Sol Swords and Warren A Hunt, Jr. A Mechanically Verified AIG to BDD Conversion Algorithm. In ITP 2010,LNCS 6172, Springer. Pages 435-449.

") (defsection hardware-verification :parents (top) :short "Libraries for working with hardware description languages, modeling circuits, etc." :long "Also see the (probably incomplete) page of ACL2-related publications.") (defsection software-verification :parents (top) :short "Software verification projects, tools, etc." :long "Also see the (probably incomplete) page of ACL2-related publications.") (defxdoc macro-libraries :parents (top macros) :short "Generally useful macros for writing more concise code, and frameworks for quickly introducing concepts like typed structures, typed lists, defining functions with type signatures, and automating other common tasks.") (defxdoc proof-automation :parents (top) :short "Tools, utilities, and strategies for dealing with particular kinds of proofs.")