diff options
| author | Hari Bathini <hbathini@linux.ibm.com> | 2018-12-04 16:19:38 +0530 |
|---|---|---|
| committer | Kazuhito Hagio <k-hagio@ab.jp.nec.com> | 2018-12-05 16:40:45 -0500 |
| commit | f349b51f621120ab74c8d7caf48307c49de19c08 (patch) | |
| tree | 950a11ef82f47cec45a5caa06c7e54028324a3a8 | |
| parent | af8e0163294efb5fc9c828f6e559689a648520a3 (diff) | |
[PATCH] ppc64: increase MAX_PHYSMEM_BITS to 2PB
* Required for kernel 4.20
With kernel commit 4ffe713b7587 ("powerpc/mm: Increase the max addressable
memory to 2PB"), MAX_PHYSMEM_BITS is bumped up to 51 for SPARSEMEM_VMEMMAP
and SPARSEMEM_EXTREME case. Make the appropriate update here.
Signed-off-by: Hari Bathini <hbathini@linux.ibm.com>
| -rw-r--r-- | arch/ppc64.c | 5 | ||||
| -rw-r--r-- | makedumpfile.h | 1 |
2 files changed, 6 insertions, 0 deletions
diff --git a/arch/ppc64.c b/arch/ppc64.c index 947a125..5b8231e 100644 --- a/arch/ppc64.c +++ b/arch/ppc64.c @@ -486,6 +486,11 @@ set_ppc64_max_physmem_bits(void) || (array_len == (NR_MEM_SECTIONS() / _SECTIONS_PER_ROOT()))) return TRUE; + info->max_physmem_bits = _MAX_PHYSMEM_BITS_4_20; + if ((array_len == (NR_MEM_SECTIONS() / _SECTIONS_PER_ROOT_EXTREME())) + || (array_len == (NR_MEM_SECTIONS() / _SECTIONS_PER_ROOT()))) + return TRUE; + return FALSE; } diff --git a/makedumpfile.h b/makedumpfile.h index 73813ed..d49f1f1 100644 --- a/makedumpfile.h +++ b/makedumpfile.h @@ -672,6 +672,7 @@ unsigned long get_kvbase_arm64(void); #define _MAX_PHYSMEM_BITS_ORIG (44) #define _MAX_PHYSMEM_BITS_3_7 (46) #define _MAX_PHYSMEM_BITS_4_19 (47) +#define _MAX_PHYSMEM_BITS_4_20 (51) #define REGION_SHIFT (60UL) #define VMEMMAP_REGION_ID (0xfUL) |