diff options
| author | Hari Bathini <hbathini@linux.vnet.ibm.com> | 2016-09-28 14:15:37 +0900 |
|---|---|---|
| committer | Atsushi Kumagai <ats-kumagai@wm.jp.nec.com> | 2016-10-14 19:57:07 +0900 |
| commit | bc86b613e5b47566d1913e614145045b71869ff6 (patch) | |
| tree | df86d0a88390f6cdc976b91bf034d17f330eba82 /arch | |
| parent | 37abbe108c859b702687d073f49afdb13a36b94e (diff) | |
[PATCH 3/8] ppc64: address changes in kernel v4.5
* Required for kernel 4.5
Starting with kernel v4.5, PTE RPN shift value for 4K page size
is increased by one to accommodate page soft dirty tracking and
_PAGE_PRESENT bit is changed. Make the corresponding changes here
and replace all instances of pte_shift with pte_rpn_shift to be
in sync with how it is referred to in the kernel. Also, remove
macro definitions that are no longer used.
Signed-off-by: Hari Bathini <hbathini@linux.vnet.ibm.com>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/ppc64.c | 9 |
1 files changed, 5 insertions, 4 deletions
diff --git a/arch/ppc64.c b/arch/ppc64.c index d1d000f..dc8f0f2 100644 --- a/arch/ppc64.c +++ b/arch/ppc64.c @@ -168,8 +168,8 @@ ppc64_vmalloc_init(void) info->l4_index_size = PGD_INDEX_SIZE_L4_64K; } - info->pte_shift = SYMBOL(demote_segment_4k) ? - PTE_SHIFT_L4_64K_V2 : PTE_SHIFT_L4_64K_V1; + info->pte_rpn_shift = (SYMBOL(demote_segment_4k) ? + PTE_RPN_SHIFT_L4_64K_V2 : PTE_RPN_SHIFT_L4_64K_V1); info->l2_masked_bits = PMD_MASKED_BITS_64K; } else { /* @@ -181,7 +181,8 @@ ppc64_vmalloc_init(void) PUD_INDEX_SIZE_L4_4K_3_7 : PUD_INDEX_SIZE_L4_4K); info->l4_index_size = PGD_INDEX_SIZE_L4_4K; - info->pte_shift = PTE_SHIFT_L4_4K; + info->pte_rpn_shift = (info->kernel_version >= KERNEL_VERSION(4, 5, 0) ? + PTE_RPN_SHIFT_L4_4K_4_5 : PTE_RPN_SHIFT_L4_4K); info->l2_masked_bits = PMD_MASKED_BITS_4K; } @@ -300,7 +301,7 @@ ppc64_vtop_level4(unsigned long vaddr) if (!pte) return NOT_PADDR; - paddr = PAGEBASE(PTOB(pte >> info->pte_shift)) + PAGEOFFSET(vaddr); + paddr = PAGEBASE(PTOB(pte >> info->pte_rpn_shift)) + PAGEOFFSET(vaddr); return paddr; } |