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-rw-r--r--[-rwxr-xr-x]lib/simulator/engine/engine_core.tcl31
1 files changed, 20 insertions, 11 deletions
diff --git a/lib/simulator/engine/engine_core.tcl b/lib/simulator/engine/engine_core.tcl
index e974656..0c78129 100755..100644
--- a/lib/simulator/engine/engine_core.tcl
+++ b/lib/simulator/engine/engine_core.tcl
@@ -2,7 +2,7 @@
# Part of MCU 8051 IDE ( http://mcu8051ide.sf.net )
############################################################################
-# Copyright (C) 2007-2009 by Martin Ošmera #
+# Copyright (C) 2007, 2008, 2009, 2010, 2011, 2012 by Martin Ošmera #
# martin.osmera@gmail.com #
# #
# This program is free software; you can redistribute it and#or modify #
@@ -21,6 +21,11 @@
# 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. #
############################################################################
+# >>> File inclusion guard
+if { ! [ info exists _ENGINE_CORE_TCL ] } {
+set _ENGINE_CORE_TCL _
+# <<< File inclusion guard
+
# --------------------------------------------------------------------------
# DESCRIPTION
# Implements virtual 8051 processor. This class is a part 8051 simulator.
@@ -54,9 +59,9 @@ class Simulator_ENGINE {
## COMMON
common symbol ;# Array of SFR symbolic names (eg. $symbol(P0) == "80")
- common DEBUG 1 ;# Turn on debugging
common PIN ;# Array describing pins with some special function
common PORT_LATCHES ;# List: Port latch registers
+ common GUI_UPDATE_INT 66;# Int: Time interval [ms] in which the GUI is regulary updated in the run mode
# Default values for SFR (values to set after reset)
common reset_reg_values {
@@ -77,10 +82,10 @@ class Simulator_ENGINE {
}
## PUBLIC
- public variable programming_language 0 ;# Int: ID of used programing language (0 == Assembler; 1 == C language)
+ public variable programming_language 0 ;# Int: ID of used programming language (0 == Assembler; 1 == C language)
## PRIVATE
- private variable breakpoints ;# Array of Lists of breakpoints (by line numbers) -- (eg '{1 45 399}')
+ private variable breakpoints ;# Array of Lists of breakpoints -- (eg '$breakpoints($file_number) == {1 45 399}')
private variable ram ;# Array of internal RAM; addr: 0..255; val: 0..255
private variable eram ;# Array of expanded RAM; addr: 0..4096; val: 0..255
@@ -102,13 +107,13 @@ class Simulator_ENGINE {
private variable Line ;# $Line($PC) == {line in source code} {filenumber} {level} {block}
private variable list_of_filenames ;# List of filenames for [lindex $Line($pc) 1]
- private variable line2PC ;# $line2PC($line) == PC
+ private variable line2PC ;# $line2PC($line_number,$file_number) == PC
private variable bank 0 ;# Current register bank (0..3)
private variable pc 0 ;# Program counter
private variable clock_kHz 0 ;# MCU clock in kHz
private variable time 0 ;# Number of instruction cycles consumed by current instruction
private variable sync_ena 0 ;# Bool: Enabled synchronization with an external interface
- private variable address_error 0 ;# Bool: Addressing error occured
+ private variable address_error 0 ;# Bool: Addressing error occurred
private variable break 0 ;# Bool: Immediately terminate the loaded program
private variable simulation_in_progress 0 ;# Bool: Engine is running
@@ -118,19 +123,19 @@ class Simulator_ENGINE {
private variable ports_previous_state {} ;# List: {P0_hex P1_hex P2_hex P3_hex P4_hex}
private variable rmw_instruction 0 ;# Bool: This instruction is one of READ-MODIFY-WRITE ones
- private variable avaliable_sfr {} ;# List: Addresses of implemented SFR
- private variable feature_avaliable ;# Array: Avaliable features
+ private variable available_sfr {} ;# List: Addresses of implemented SFR
+ private variable feature_available ;# Array: available features
private variable restricted_bits {} ;# List: Decimal addresses of unimplemented bits
private variable write_only_regs {} ;# List: Decimal addresses of write only registers
- private variable incomplite_regs {} ;# List: Decimal addresses of not fully implemented registers
- private variable incomplite_regs_mask ;# Array: key == dec. addr.; val == mask of implemented bits
+ private variable incomplete_regs {} ;# List: Decimal addresses of not fully implemented registers
+ private variable incomplete_regs_mask ;# Array: key == dec. addr.; val == mask of implemented bits
private variable DPL {DP0L} ;# Address of current DPL register (DTPR)
private variable DPH {DP0H} ;# Address of current DPH register (DTPR)
private variable hidden_DPTR0 {0 0} ;# Value of DPTR0 (if dual DPTR is hidden)
private variable hidden_DPTR1 {0 0} ;# Value of DPTR1 (if dual DPTR is hidden)
- private variable watchdog_value 0 ;# Int: Current value of watchdog timer (if avaliable)
+ private variable watchdog_value 0 ;# Int: Current value of watchdog timer (if available)
private variable wdtrst_prev_val 0 ;# Int: Previous value of register WDTRST
private variable wdt_prescaler_val 0 ;# Int: Watchdog prescaler value (content)
@@ -272,3 +277,7 @@ class Simulator_ENGINE {
# Initialize NS variables
Simulator_ENGINE::InitializeNS
+
+# >>> File inclusion guard
+}
+# <<< File inclusion guard