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authorDan Williams <dan.j.williams@intel.com>2008-07-18 17:47:13 -0700
committerDan Williams <dan.j.williams@intel.com>2008-07-18 17:47:13 -0700
commit800053d6003f78e7302144bbacb4ccb488721c2e (patch)
treec465d21be1a09c8144665584e4834b5ca27ce3f0 /md.4
parenta5ee6dfbf506424103d4de6579037836858bea72 (diff)
Documentation fixup for stripe_cache_size
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
Diffstat (limited to 'md.4')
-rw-r--r--md.415
1 files changed, 9 insertions, 6 deletions
diff --git a/md.4 b/md.4
index ef43d9d7..f6d60fa2 100644
--- a/md.4
+++ b/md.4
@@ -526,19 +526,22 @@ Finally, "idle" can be written to stop the check/repair process.
.B md/stripe_cache_size
This is only available on RAID5 and RAID6. It records the size (in
pages per device) of the stripe cache which is used for synchronising
-all read and write operations to the array. The default is 128.
+all write operations to the array and all read operations if the array
+is degraded. The default is 256. Valid values are 17 to 32768.
Increasing this number can increase performance in some situations, at
-some cost in system memory.
+some cost in system memory. Note, setting this value too high can
+result in an "out of memory" condition for the system.
+
+memory_consumed = system_page_size * nr_disks * stripe_cache_size
.TP
.B md/preread_bypass_threshold
This is only available on RAID5 and RAID6. This variable sets the
number of times MD will service a full-stripe-write before servicing a
stripe that requires some "prereading". For fairness this defaults to
-1. Setting this to 0 maximizes sequential-write throughput at the cost
-of fairness to threads doing small or random writes. Valid values are 0
-to stripe_cache_size.
-
+1. Valid values are 0 to stripe_cache_size. Setting this to 0
+maximizes sequential-write throughput at the cost of fairness to threads
+doing small or random writes.
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