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-rw-r--r--src/ChezScheme/s/mkheader.ss88
1 files changed, 63 insertions, 25 deletions
diff --git a/src/ChezScheme/s/mkheader.ss b/src/ChezScheme/s/mkheader.ss
index 8e13572e1a..6c5ca768b2 100644
--- a/src/ChezScheme/s/mkheader.ss
+++ b/src/ChezScheme/s/mkheader.ss
@@ -45,6 +45,8 @@
[(#\?) (cons #\p rest)]
[(#\>) rest]
[(#\*) (cons #\s rest)]
+ [(#\=) (cons* #\e #\q #\l rest)]
+ [(#\?) (cons #\p rest)]
[else (cons x rest)]))
'()
(string->list (symbol->string x))))))
@@ -190,7 +192,9 @@
(constant-case architecture
[(pb)
(nl)
- (pr "#define _LARGEFILE64_SOURCE\n") ; needed on some 32-bit platforms before <stdint.h>
+ (pr "#ifndef _LARGEFILE64_SOURCE\n")
+ (pr "# define _LARGEFILE64_SOURCE\n") ; needed on some 32-bit platforms before <stdint.h>
+ (pr "#endif\n")
(pr "#include <stdint.h>\n")]
[else (void)])
@@ -274,6 +278,7 @@
(deftotypep "Svectorp" ($ mask-vector) ($ type-vector))
(deftotypep "Sfxvectorp" ($ mask-fxvector) ($ type-fxvector))
+ (deftotypep "Sflvectorp" ($ mask-flvector) ($ type-flvector))
(deftotypep "Sbytevectorp" ($ mask-bytevector) ($ type-bytevector))
(deftotypep "Sstringp" ($ mask-string) ($ type-string))
(deftotypep "Sstencil_vectorp" ($ mask-stencil-vector) ($ type-stencil-vector))
@@ -308,6 +313,12 @@
(access "x" fxvector type)
($ fxvector-length-offset)))
(defref Sfxvector_ref fxvector data)
+
+ (def "Sflvector_length(x)"
+ (format "((iptr)((uptr)~a>>~d))"
+ (access "x" flvector type)
+ ($ flvector-length-offset)))
+ (defref Sflvector_ref flvector data)
(def "Sbytevector_length(x)"
(format "((iptr)((uptr)~a>>~d))"
@@ -347,6 +358,7 @@
(format "((void)(~a = (string_char)(uptr)Schar(c)))"
(access "x" "i" string data)))
(def "Sfxvector_set(x,i,n)" "((void)(Sfxvector_ref(x,i) = (n)))")
+ (def "Sflvector_set(x,i,n)" "((void)(Sflvector_ref(x,i) = (n)))")
(def "Sbytevector_u8_set(x,i,n)" "((void)(Sbytevector_u8_ref(x,i) = (n)))")
(export "void" "Svector_set" "(ptr, iptr, ptr)")
@@ -370,6 +382,7 @@
(export "ptr" "Sflonum" "(double)")
(export "ptr" "Smake_vector" "(iptr, ptr)")
(export "ptr" "Smake_fxvector" "(iptr, ptr)")
+ (export "ptr" "Smake_flvector" "(iptr, ptr)")
(export "ptr" "Smake_bytevector" "(iptr, int)")
(export "ptr" "Smake_string" "(iptr, int)")
(export "ptr" "Smake_uninitialized_string" "(iptr)")
@@ -422,6 +435,7 @@
(export "void" "Sregister_boot_file" "(const char *)")
(export "void" "Sregister_boot_direct_file" "(const char *)")
(export "void" "Sregister_boot_file_fd" "(const char *, int fd)")
+ (export "void" "Sregister_boot_file_fd_region" "(const char *, int fd, iptr offset, iptr len, int close_after)")
(export "void" "Sregister_heap_file" "(const char *)")
(export "void" "Scompact_heap" "(void)")
(export "void" "Ssave_heap" "(const char *, int)")
@@ -640,9 +654,12 @@
(pr " : \"r\" (addr) \\~%")
(pr " : \"flags\", \"memory\")~%")))]
[(ppc32)
+ (let ([reg (constant-case machine-type-name
+ [(ppc32osx tppc32osx) ""]
+ [else "%%"])])
(pr "#define INITLOCK(addr) \\~%")
- (pr " __asm__ __volatile__ (\"li %%r0, 0\\n\\t\"\\~%")
- (pr " \"stw %%r0, 0(%0)\\n\\t\"\\~%")
+ (pr " __asm__ __volatile__ (\"li ~ar0, 0\\n\\t\"\\~%" reg)
+ (pr " \"stw ~ar0, 0(%0)\\n\\t\"\\~%" reg)
(pr " : \\~%")
(pr " : \"b\" (addr)\\~%")
(pr " :\"memory\", \"r0\")~%")
@@ -650,16 +667,16 @@
(nl)
(pr "#define SPINLOCK(addr) \\~%")
(pr " __asm__ __volatile__ (\"0:\\n\\t\"\\~%") ; top:
- (pr " \"lwarx %%r0, 0, %0\\n\\t\"\\~%") ; start lock acquisition
- (pr " \"cmpwi %%r0, 0\\n\\t\"\\~%") ; see if someone already owns the lock
+ (pr " \"lwarx ~ar0, 0, %0\\n\\t\"\\~%" reg) ; start lock acquisition
+ (pr " \"cmpwi ~ar0, 0\\n\\t\"\\~%" reg) ; see if someone already owns the lock
(pr " \"bne 1f\\n\\t\"\\~%") ; if so, go to our try_again loop
- (pr " \"li %%r0, 1\\n\\t\"\\~%") ; attempt to store the value 1
- (pr " \"stwcx. %%r0, 0, %0\\n\\t\"\\~%") ;
+ (pr " \"li ~ar0, 1\\n\\t\"\\~%" reg) ; attempt to store the value 1
+ (pr " \"stwcx. ~ar0, 0, %0\\n\\t\"\\~%" reg);
(pr " \"beq 2f\\n\\t\"\\~%") ; if we succeed, we own the lock
(pr " \"1:\\n\\t\"\\~%") ; again:
(pr " \"isync\\n\\t\"\\~%") ; sync things to pause the processor
- (pr " \"lwz %%r0, 0(%0)\\n\\t\"\\~%") ; try a non-reserved load to see if we are likely to succeed
- (pr " \"cmpwi %%r0, 0\\n\\t\"\\~%") ; if it is = 0, try to acquire at start
+ (pr " \"lwz ~ar0, 0(%0)\\n\\t\"\\~%" reg) ; try a non-reserved load to see if we are likely to succeed
+ (pr " \"cmpwi ~ar0, 0\\n\\t\"\\~%" reg) ; if it is = 0, try to acquire at start
(pr " \"beq 0b\\n\\t\"\\~%") ;
(pr " \"b 1b\\n\\t\"\\~%") ; othwerise loop through the try again
(pr " \"2:\\n\\t\"\\~%") ; done:
@@ -669,8 +686,8 @@
(nl)
(pr "#define UNLOCK(addr) \\~%")
- (pr " __asm__ __volatile__ (\"li %%r0, 0\\n\\t\"\\~%")
- (pr " \"stw %%r0, 0(%0)\\n\\t\"\\~%")
+ (pr " __asm__ __volatile__ (\"li ~ar0, 0\\n\\t\"\\~%" reg)
+ (pr " \"stw ~ar0, 0(%0)\\n\\t\"\\~%" reg)
(pr " : \\~%")
(pr " : \"b\" (addr)\\~%")
(pr " :\"memory\", \"r0\")~%")
@@ -679,11 +696,11 @@
(pr "#define LOCKED_INCR(addr, ret) \\~%")
(pr " __asm__ __volatile__ (\"li %0, 0\\n\\t\"\\~%")
(pr " \"0:\\n\\t\"\\~%")
- (pr " \"lwarx %%r12, 0, %1\\n\\t\"\\~%")
- (pr " \"addi %%r12, %%r12, 1\\n\\t\"\\~%")
- (pr " \"stwcx. %%r12, 0, %1\\n\\t\"\\~%")
+ (pr " \"lwarx ~ar12, 0, %1\\n\\t\"\\~%" reg)
+ (pr " \"addi ~ar12, ~ar12, 1\\n\\t\"\\~%" reg reg)
+ (pr " \"stwcx. ~ar12, 0, %1\\n\\t\"\\~%" reg)
(pr " \"bne 0b\\n\\t\"\\~%")
- (pr " \"cmpwi %%r12, 0\\n\\t\"\\~%")
+ (pr " \"cmpwi ~ar12, 0\\n\\t\"\\~%" reg)
(pr " \"bne 1f\\n\\t\"\\~%")
(pr " \"li %0, 1\\n\\t\"\\~%")
(pr " \"1:\\n\\t\"\\~%")
@@ -695,17 +712,17 @@
(pr "#define LOCKED_DECR(addr, ret) \\~%")
(pr " __asm__ __volatile__ (\"li %0, 0\\n\\t\"\\~%")
(pr " \"0:\\n\\t\"\\~%")
- (pr " \"lwarx %%r12, 0, %1\\n\\t\"\\~%")
- (pr " \"addi %%r12, %%r12, -1\\n\\t\"\\~%")
- (pr " \"stwcx. %%r12, 0, %1\\n\\t\"\\~%")
+ (pr " \"lwarx ~ar12, 0, %1\\n\\t\"\\~%" reg)
+ (pr " \"addi ~ar12, ~ar12, -1\\n\\t\"\\~%" reg reg)
+ (pr " \"stwcx. ~ar12, 0, %1\\n\\t\"\\~%" reg)
(pr " \"bne 0b\\n\\t\"\\~%")
- (pr " \"cmpwi %%r12, 0\\n\\t\"\\~%")
+ (pr " \"cmpwi ~ar12, 0\\n\\t\"\\~%" reg)
(pr " \"bne 1f\\n\\t\"\\~%")
(pr " \"li %0, 1\\n\\t\"\\~%")
(pr " \"1:\\n\\t\"\\~%")
(pr " : \"=&r\" (ret)\\~%")
(pr " : \"r\" (addr)\\~%")
- (pr " : \"cc\", \"memory\", \"r12\")~%")]
+ (pr " : \"cc\", \"memory\", \"r12\")~%"))]
[(arm32)
(pr "#define INITLOCK(addr) \\~%")
(pr " __asm__ __volatile__ (\"mov r12, #0\\n\\t\"\\~%")
@@ -752,6 +769,7 @@
(pr " \"cmp r7, #0\\n\\t\"\\~%")
(pr " \"bne 0b\\n\\t\"\\~%")
(pr " \"cmp r12, #0\\n\\t\"\\~%")
+ (pr " \"it eq\\n\\t\"\\~%")
(pr " \"moveq %0, #1\\n\\t\"\\~%")
(pr " : \"=&r\" (ret)\\~%")
(pr " : \"r\" (addr)\\~%")
@@ -767,6 +785,7 @@
(pr " \"cmp r7, #0\\n\\t\"\\~%")
(pr " \"bne 0b\\n\\t\"\\~%")
(pr " \"cmp r12, #0\\n\\t\"\\~%")
+ (pr " \"it eq\\n\\t\"\\~%")
(pr " \"moveq %0, #1\\n\\t\"\\~%")
(pr " : \"=&r\" (ret)\\~%")
(pr " : \"r\" (addr)\\~%")
@@ -809,6 +828,8 @@
(nl)
(pr "#define LOCKED_INCR(addr, ret) \\~%")
+ (pr " do {\\~%")
+ (pr " long _return_;\\~%")
(pr " __asm__ __volatile__ (\"mov %0, #0\\n\\t\"\\~%")
(pr " \"0:\\n\\t\"\\~%")
(pr " \"ldxr x12, [%1, #0]\\n\\t\"\\~%")
@@ -820,12 +841,16 @@
(pr " \"bne 1f\\n\\t\"\\~%")
(pr " \"mov %0, #1\\n\\t\"\\~%")
(pr " \"1:\\n\\t\"\\~%")
- (pr " : \"=&r\" (ret)\\~%")
+ (pr " : \"=&r\" (_return_)\\~%")
(pr " : \"r\" (addr)\\~%")
- (pr " : \"cc\", \"memory\", \"x12\", \"x7\")~%")
+ (pr " : \"cc\", \"memory\", \"x12\", \"x7\");\\~%")
+ (pr " ret = _return_;\\~%")
+ (pr " } while (0)~%")
(nl)
(pr "#define LOCKED_DECR(addr, ret) \\~%")
+ (pr " do {\\~%")
+ (pr " long _return_;\\~%")
(pr " __asm__ __volatile__ (\"mov %0, #0\\n\\t\"\\~%")
(pr " \"0:\\n\\t\"\\~%")
(pr " \"ldxr x12, [%1, #0]\\n\\t\"\\~%")
@@ -837,9 +862,11 @@
(pr " \"bne 1f\\n\\t\"\\~%")
(pr " \"mov %0, #1\\n\\t\"\\~%")
(pr " \"1:\\n\\t\"\\~%")
- (pr " : \"=&r\" (ret)\\~%")
+ (pr " : \"=&r\" (_return_)\\~%")
(pr " : \"r\" (addr)\\~%")
- (pr " : \"cc\", \"memory\", \"x12\", \"x7\")~%")]
+ (pr " : \"cc\", \"memory\", \"x12\", \"x7\");\\~%")
+ (pr " ret = _return_;\\~%")
+ (pr " } while (0)~%")]
[(pb)
(pr "#define INITLOCK(addr) (*((long *) addr) = 0)~%")
(pr "#define SPINLOCK(addr) (*((long *) addr) = 1)~%")
@@ -1000,6 +1027,9 @@
(defref FXVECTOR_TYPE fxvector type)
(defref FXVECTIT fxvector data)
+ (defref FLVECTOR_TYPE flvector type)
+ (defref FLVECTIT flvector data)
+
(defref BYTEVECTOR_TYPE bytevector type)
(defref BVIT bytevector data)
@@ -1069,7 +1099,7 @@
(defref RTDCOUNTSTIMESTAMP rtd-counts timestamp)
(defref RTDCOUNTSIT rtd-counts data)
- (defref RECORDDESCPARENT record-type parent)
+ (defref RECORDDESCANCESTRY record-type ancestry)
(defref RECORDDESCSIZE record-type size)
(defref RECORDDESCPM record-type pm)
(defref RECORDDESCMPM record-type mpm)
@@ -1125,6 +1155,14 @@
(defref RPCOMPACTHEADERMASKANDSIZE rp-compact-header mask+size+mode)
(defref RPCOMPACTHEADERTOPLINK rp-compact-header toplink)
+ (defref VFASLHEADER_DATA_SIZE vfasl-header data-size)
+ (defref VFASLHEADER_TABLE_SIZE vfasl-header table-size)
+ (defref VFASLHEADER_RESULT_OFFSET vfasl-header result-offset)
+ (defref VFASLHEADER_VSPACE_REL_OFFSETS vfasl-header vspace-rel-offsets)
+ (defref VFASLHEADER_SYMREF_COUNT vfasl-header symref-count)
+ (defref VFASLHEADER_RTDREF_COUNT vfasl-header rtdref-count)
+ (defref VFASLHEADER_SINGLETONREF_COUNT vfasl-header singletonref-count)
+
(nl)
(comment "machine types")
(pr "#define machine_type_names ")
generated by cgit v1.2.3 (git 2.25.1) at 2024-07-05 22:10:09 +0000