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authorClifford Wolf <clifford@clifford.at>2016-02-13 17:31:24 +0100
committerClifford Wolf <clifford@clifford.at>2016-02-13 17:31:24 +0100
commitbcc873b805f8ec74422752da530b71d8d762bded (patch)
treeeffe0c5495a8c2a55235bd2db1bd635923d97528
parent6f1d694171a5fd667f05402cc4e93fe2c66428e4 (diff)
Fixed some visual studio warnings
-rw-r--r--frontends/ast/ast.cc2
-rw-r--r--frontends/ast/genrtlil.cc2
-rw-r--r--frontends/ast/simplify.cc4
-rw-r--r--kernel/hashlib.h2
-rw-r--r--kernel/modtools.h4
-rw-r--r--kernel/yosys.cc2
-rw-r--r--passes/memory/memory_dff.cc2
-rw-r--r--passes/techmap/techmap.cc2
8 files changed, 10 insertions, 10 deletions
diff --git a/frontends/ast/ast.cc b/frontends/ast/ast.cc
index 3e163bae..834ee82a 100644
--- a/frontends/ast/ast.cc
+++ b/frontends/ast/ast.cc
@@ -820,7 +820,7 @@ uint64_t AstNode::asInt(bool is_signed)
}
if (type == AST_REALVALUE)
- return realvalue;
+ return uint64_t(realvalue);
log_abort();
}
diff --git a/frontends/ast/genrtlil.cc b/frontends/ast/genrtlil.cc
index 876bfbe3..9fc59037 100644
--- a/frontends/ast/genrtlil.cc
+++ b/frontends/ast/genrtlil.cc
@@ -1257,7 +1257,7 @@ RTLIL::SigSpec AstNode::genRTLIL(int width_hint, bool sign_hint)
if (type == AST_MEMINIT) {
if (children[2]->type != AST_CONSTANT)
log_error("Memory init with non-constant word count at %s:%d!\n", filename.c_str(), linenum);
- num_words = children[2]->asInt(false);
+ num_words = int(children[2]->asInt(false));
cell->parameters["\\WORDS"] = RTLIL::Const(num_words);
}
diff --git a/frontends/ast/simplify.cc b/frontends/ast/simplify.cc
index 2264d896..2621be49 100644
--- a/frontends/ast/simplify.cc
+++ b/frontends/ast/simplify.cc
@@ -1705,7 +1705,7 @@ skip_dynamic_range_lvalue_expansion:;
while (node_addr->simplify(true, false, false, stage, width_hint, sign_hint, false)) { }
if (node_addr->type != AST_CONSTANT)
log_error("Failed to evaluate system function `%s' with non-constant 3rd argument at %s:%d.\n", str.c_str(), filename.c_str(), linenum);
- start_addr = node_addr->asInt(false);
+ start_addr = int(node_addr->asInt(false));
}
if (GetSize(children) > 3) {
@@ -1713,7 +1713,7 @@ skip_dynamic_range_lvalue_expansion:;
while (node_addr->simplify(true, false, false, stage, width_hint, sign_hint, false)) { }
if (node_addr->type != AST_CONSTANT)
log_error("Failed to evaluate system function `%s' with non-constant 4th argument at %s:%d.\n", str.c_str(), filename.c_str(), linenum);
- finish_addr = node_addr->asInt(false);
+ finish_addr = int(node_addr->asInt(false));
}
bool unconditional_init = false;
diff --git a/kernel/hashlib.h b/kernel/hashlib.h
index a31c62e5..972a8b8d 100644
--- a/kernel/hashlib.h
+++ b/kernel/hashlib.h
@@ -74,7 +74,7 @@ template<> struct hash_ops<int32_t> : hash_int_ops
template<> struct hash_ops<int64_t> : hash_int_ops
{
static inline unsigned int hash(int64_t a) {
- return mkhash(a, a >> 32);
+ return mkhash((unsigned int)(a), (unsigned int)(a >> 32));
}
};
diff --git a/kernel/modtools.h b/kernel/modtools.h
index 1480ec71..ffcb48d4 100644
--- a/kernel/modtools.h
+++ b/kernel/modtools.h
@@ -180,8 +180,8 @@ struct ModIndex : public RTLIL::Monitor
{
RTLIL::SigBit lhs = sigmap(sigsig.first[i]);
RTLIL::SigBit rhs = sigmap(sigsig.second[i]);
- bool has_lhs = database.count(lhs);
- bool has_rhs = database.count(rhs);
+ bool has_lhs = database.count(lhs) != 0;
+ bool has_rhs = database.count(rhs) != 0;
if (!has_lhs && !has_rhs) {
sigmap.add(lhs, rhs);
diff --git a/kernel/yosys.cc b/kernel/yosys.cc
index 4bfbe361..8590242d 100644
--- a/kernel/yosys.cc
+++ b/kernel/yosys.cc
@@ -193,7 +193,7 @@ std::string vstringf(const char *fmt, va_list ap)
int readsome(std::istream &f, char *s, int n)
{
- int rc = f.readsome(s, n);
+ int rc = int(f.readsome(s, n));
// f.readsome() sometimes returns 0 on a non-empty stream..
if (rc == 0) {
diff --git a/passes/memory/memory_dff.cc b/passes/memory/memory_dff.cc
index 2eec0207..beb2016a 100644
--- a/passes/memory/memory_dff.cc
+++ b/passes/memory/memory_dff.cc
@@ -164,7 +164,7 @@ struct MemoryDffWorker
if (mux_cells_a.count(sig_data) || mux_cells_b.count(sig_data))
{
- bool enable_invert = mux_cells_a.count(sig_data);
+ bool enable_invert = mux_cells_a.count(sig_data) != 0;
Cell *mux = enable_invert ? mux_cells_a.at(sig_data) : mux_cells_b.at(sig_data);
SigSpec check_q = sigmap(mux->getPort(enable_invert ? "\\B" : "\\A"));
diff --git a/passes/techmap/techmap.cc b/passes/techmap/techmap.cc
index 19b2bda9..5334ebfa 100644
--- a/passes/techmap/techmap.cc
+++ b/passes/techmap/techmap.cc
@@ -313,7 +313,7 @@ struct TechmapWorker
if (c->type == "$memrd" || c->type == "$memwr" || c->type == "$meminit") {
IdString memid = c->getParam("\\MEMID").decode_string();
- log_assert(memory_renames.count(memid));
+ log_assert(memory_renames.count(memid) != 0);
c->setParam("\\MEMID", Const(memory_renames[memid].str()));
}