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authorClifford Wolf <clifford@clifford.at>2014-07-27 14:47:23 +0200
committerClifford Wolf <clifford@clifford.at>2014-07-27 14:47:23 +0200
commitcbc3a46a9717f0f6e90b20b29c9003c3720a5aa0 (patch)
tree90aaa186d4e658f9fa729bef3c4ccf9c9ec5007a
parentdbb3556e3f1e82a6b69d5e8714a0266c1d461c7c (diff)
Added RTLIL::SigSpecConstIterator
-rw-r--r--kernel/rtlil.h18
1 files changed, 18 insertions, 0 deletions
diff --git a/kernel/rtlil.h b/kernel/rtlil.h
index 7c69ff64..4341e067 100644
--- a/kernel/rtlil.h
+++ b/kernel/rtlil.h
@@ -70,6 +70,7 @@ namespace RTLIL
struct SigChunk;
struct SigBit;
struct SigSpecIterator;
+ struct SigSpecConstIterator;
struct SigSpec;
struct CaseRule;
struct SwitchRule;
@@ -698,6 +699,16 @@ struct RTLIL::SigSpecIterator
inline void operator++() { index++; }
};
+struct RTLIL::SigSpecConstIterator
+{
+ const RTLIL::SigSpec *sig_p;
+ int index;
+
+ inline const RTLIL::SigBit &operator*() const;
+ inline bool operator!=(const RTLIL::SigSpecConstIterator &other) const { return index != other.index; }
+ inline void operator++() { index++; }
+};
+
struct RTLIL::SigSpec
{
private:
@@ -762,6 +773,9 @@ public:
inline RTLIL::SigSpecIterator begin() { RTLIL::SigSpecIterator it; it.sig_p = this; it.index = 0; return it; }
inline RTLIL::SigSpecIterator end() { RTLIL::SigSpecIterator it; it.sig_p = this; it.index = width_; return it; }
+ inline RTLIL::SigSpecConstIterator begin() const { RTLIL::SigSpecConstIterator it; it.sig_p = this; it.index = 0; return it; }
+ inline RTLIL::SigSpecConstIterator end() const { RTLIL::SigSpecConstIterator it; it.sig_p = this; it.index = width_; return it; }
+
void sort();
void sort_and_unify();
@@ -829,6 +843,10 @@ inline RTLIL::SigBit &RTLIL::SigSpecIterator::operator*() const {
return (*sig_p)[index];
}
+inline const RTLIL::SigBit &RTLIL::SigSpecConstIterator::operator*() const {
+ return (*sig_p)[index];
+}
+
inline RTLIL::SigBit::SigBit(const RTLIL::SigSpec &sig) {
assert(sig.size() == 1 && sig.chunks().size() == 1);
*this = SigBit(sig.chunks().front());