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authorClifford Wolf <clifford@clifford.at>2013-01-16 17:32:11 +0100
committerClifford Wolf <clifford@clifford.at>2013-01-16 17:32:11 +0100
commit6d1502b9484a445e5184bdf622f87fcd14d0a0f9 (patch)
tree76180477f9ab2c690c9138b028dd75a12639ddb8 /README
parente8231ee46b79a0d24e3b8c5b75f75fc71efcd0d3 (diff)
Added support for "always @(*)"
Diffstat (limited to 'README')
-rw-r--r--README2
1 files changed, 1 insertions, 1 deletions
diff --git a/README b/README
index 13591693..5d78206d 100644
--- a/README
+++ b/README
@@ -74,7 +74,7 @@ or using a simple synthesis script:
proc; opt; techmap; opt
write_verilog synth.v
- $ ././yosys synth.ys
+ $ ./yosys synth.ys
It is also possible to only have the synthesis commands but not the read/write
commands in the synthesis script: