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authorClifford Wolf <clifford@clifford.at>2013-03-18 15:05:15 +0100
committerClifford Wolf <clifford@clifford.at>2013-03-18 15:05:15 +0100
commit71de6660036c7cea95884554382bc2913af36252 (patch)
tree2ec1f4e2f89ac17cfbe11b32b579fb320a7eff4c /README
parentbc5489f7ec22628553c587df3bcf40cea47cf755 (diff)
More TODOs in README
Diffstat (limited to 'README')
-rw-r--r--README8
1 files changed, 7 insertions, 1 deletions
diff --git a/README b/README
index 89aa0544..cbd77bb1 100644
--- a/README
+++ b/README
@@ -197,9 +197,15 @@ TODOs / Open Bugs
- Write "design and implementation of.." document
+ - Source tree layout
+ - Data formats (c++ classes, etc.)
+ - Interne misc. frameworks (log, select)
+ - Build system and pass registration
+ - Internal cell library
+
- Add brief source code documentation to:
- - Most passes and kernel functionalities
+ - Most passes and kernel functionalities
- Implement missing Verilog 2005 features: