diff options
| author | Clifford Wolf <clifford@clifford.at> | 2014-07-26 11:58:03 +0200 |
|---|---|---|
| committer | Clifford Wolf <clifford@clifford.at> | 2014-07-26 11:58:03 +0200 |
| commit | cc4f10883bcc5f0a3c1b4f0937e60be3c6a1b121 (patch) | |
| tree | 2d417ab32f95d109a0d8438ae7a14acf51783c5b /backends/edif/edif.cc | |
| parent | 665759fceee4a0db3e776b7912e976eea2ff29a3 (diff) | |
Renamed RTLIL::{Module,Cell}::connections to connections_
Diffstat (limited to 'backends/edif/edif.cc')
| -rw-r--r-- | backends/edif/edif.cc | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/backends/edif/edif.cc b/backends/edif/edif.cc index a3ae9649..13ab4dc6 100644 --- a/backends/edif/edif.cc +++ b/backends/edif/edif.cc @@ -148,7 +148,7 @@ struct EdifBackend : public Backend { RTLIL::Cell *cell = cell_it.second; if (!design->modules.count(cell->type) || design->modules.at(cell->type)->get_bool_attribute("\\blackbox")) { lib_cell_ports[cell->type]; - for (auto p : cell->connections) { + for (auto p : cell->connections_) { if (p.second.size() > 1) log_error("Found multi-bit port %s on library cell %s.%s (%s): not supported in EDIF backend!\n", RTLIL::id2cstr(p.first), RTLIL::id2cstr(module->name), RTLIL::id2cstr(cell->name), RTLIL::id2cstr(cell->type)); @@ -304,7 +304,7 @@ struct EdifBackend : public Backend { fprintf(f, "\n (property %s (string \"%s\"))", EDIF_DEF(p.first), hex_string.c_str()); } fprintf(f, ")\n"); - for (auto &p : cell->connections) { + for (auto &p : cell->connections_) { RTLIL::SigSpec sig = sigmap(p.second); for (int i = 0; i < SIZE(sig); i++) if (sig.size() == 1) |