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authorClifford Wolf <clifford@clifford.at>2014-02-17 14:28:52 +0100
committerClifford Wolf <clifford@clifford.at>2014-02-17 14:28:52 +0100
commit02e6f2c5be8c5514cc8cdb7b3344f6170fb87af9 (patch)
treee5adb1a2baa9eba28f7c28bf755d00da266bfe52 /frontends/ast/ast.h
parent0851c2b6ea7044d9bce2014a2be2365a2bf7e1b0 (diff)
Added Verilog support for "`default_nettype none"
Diffstat (limited to 'frontends/ast/ast.h')
-rw-r--r--frontends/ast/ast.h6
1 files changed, 3 insertions, 3 deletions
diff --git a/frontends/ast/ast.h b/frontends/ast/ast.h
index f42bc35f..72a2a460 100644
--- a/frontends/ast/ast.h
+++ b/frontends/ast/ast.h
@@ -238,13 +238,13 @@ namespace AST
};
// process an AST tree (ast must point to an AST_DESIGN node) and generate RTLIL code
- void process(RTLIL::Design *design, AstNode *ast, bool dump_ast1 = false, bool dump_ast2 = false, bool dump_vlog = false, bool nolatches = false, bool nomem2reg = false, bool mem2reg = false, bool lib = false, bool noopt = false, bool icells = false, bool ignore_redef = false, bool defer = true);
+ void process(RTLIL::Design *design, AstNode *ast, bool dump_ast1, bool dump_ast2, bool dump_vlog, bool nolatches, bool nomem2reg, bool mem2reg, bool lib, bool noopt, bool icells, bool ignore_redef, bool defer, bool autowire);
// parametric modules are supported directly by the AST library
// therfore we need our own derivate of RTLIL::Module with overloaded virtual functions
struct AstModule : RTLIL::Module {
AstNode *ast;
- bool nolatches, nomem2reg, mem2reg, lib, noopt, icells;
+ bool nolatches, nomem2reg, mem2reg, lib, noopt, icells, autowire;
virtual ~AstModule();
virtual RTLIL::IdString derive(RTLIL::Design *design, std::map<RTLIL::IdString, RTLIL::Const> parameters);
virtual RTLIL::Module *clone() const;
@@ -265,7 +265,7 @@ namespace AST
namespace AST_INTERNAL
{
// internal state variables
- extern bool flag_dump_ast1, flag_dump_ast2, flag_nolatches, flag_nomem2reg, flag_mem2reg, flag_lib, flag_noopt, flag_icells;
+ extern bool flag_dump_ast1, flag_dump_ast2, flag_nolatches, flag_nomem2reg, flag_mem2reg, flag_lib, flag_noopt, flag_icells, flag_autowire;
extern AST::AstNode *current_ast, *current_ast_mod;
extern std::map<std::string, AST::AstNode*> current_scope;
extern RTLIL::SigSpec *genRTLIL_subst_from, *genRTLIL_subst_to, ignoreThisSignalsInInitial;