Merge branch 'master' of https://github.com/cliffordwolf/yosys into btor

added case for memwr cell that is used in muxes (same cell is used more than one time)
corrected bug for xnor and logic_not
added pmux cell translation

Conflicts:
	backends/btor/btor.cc

5 files changed, 83 insertions, 103 deletions

diff --git a/frontends/ilang/Makefile.inc b/frontends/ilang/Makefile.inc
index 07ebf085..e832cfed 100644
--- a/frontends/ilang/Makefile.inc
+++ b/frontends/ilang/Makefile.inc
@@ -4,12 +4,14 @@ GENFILES += frontends/ilang/parser.tab.h
 GENFILES += frontends/ilang/parser.output
 GENFILES += frontends/ilang/lexer.cc
 
-frontends/ilang/parser.tab.cc frontends/ilang/parser.tab.h: frontends/ilang/parser.y
-	bison -d -r all -b frontends/ilang/parser frontends/ilang/parser.y
-	mv frontends/ilang/parser.tab.c frontends/ilang/parser.tab.cc
+frontends/ilang/parser.tab.cc: frontends/ilang/parser.y
+	$(P) bison -d -r all -b frontends/ilang/parser frontends/ilang/parser.y
+	$(Q) mv frontends/ilang/parser.tab.c frontends/ilang/parser.tab.cc
+
+frontends/ilang/parser.tab.h: frontends/ilang/parser.tab.cc
 
 frontends/ilang/lexer.cc: frontends/ilang/lexer.l
-	flex -o frontends/ilang/lexer.cc frontends/ilang/lexer.l
+	$(P) flex -o frontends/ilang/lexer.cc frontends/ilang/lexer.l
 
 OBJS += frontends/ilang/parser.tab.o frontends/ilang/lexer.o
 OBJS += frontends/ilang/ilang_frontend.o
diff --git a/frontends/ilang/ilang_frontend.cc b/frontends/ilang/ilang_frontend.cc
index 572a3572..f6f926db 100644
--- a/frontends/ilang/ilang_frontend.cc
+++ b/frontends/ilang/ilang_frontend.cc
@@ -26,6 +26,8 @@
 #include "kernel/register.h"
 #include "kernel/log.h"
 
+YOSYS_NAMESPACE_BEGIN
+
 void rtlil_frontend_ilang_yyerror(char const *s)
 {
 	log_error("Parser error in line %d: %s\n", rtlil_frontend_ilang_yyget_lineno(), s);
@@ -43,17 +45,20 @@ struct IlangFrontend : public Frontend {
 		log("representation of a design in yosys's internal format.)\n");
 		log("\n");
 	}
-	virtual void execute(FILE *&f, std::string filename, std::vector<std::string> args, RTLIL::Design *design)
+	virtual void execute(std::istream *&f, std::string filename, std::vector<std::string> args, RTLIL::Design *design)
 	{
 		log_header("Executing ILANG frontend.\n");
 		extra_args(f, filename, args, 1);
 		log("Input filename: %s\n", filename.c_str());
 
+		ILANG_FRONTEND::lexin = f;
 		ILANG_FRONTEND::current_design = design;
 		rtlil_frontend_ilang_yydebug = false;
-		rtlil_frontend_ilang_yyrestart(f);
+		rtlil_frontend_ilang_yyrestart(NULL);
 		rtlil_frontend_ilang_yyparse();
 		rtlil_frontend_ilang_yylex_destroy();
 	}
 } IlangFrontend;
 
+YOSYS_NAMESPACE_END
+
diff --git a/frontends/ilang/ilang_frontend.h b/frontends/ilang/ilang_frontend.h
index 5e768c3b..b04d6c51 100644
--- a/frontends/ilang/ilang_frontend.h
+++ b/frontends/ilang/ilang_frontend.h
@@ -25,20 +25,23 @@
 #ifndef ILANG_FRONTEND_H
 #define ILANG_FRONTEND_H
 
-#include "kernel/rtlil.h"
-#include <stdio.h>
+#include "kernel/yosys.h"
+
+YOSYS_NAMESPACE_BEGIN
 
 namespace ILANG_FRONTEND {
-	void ilang_frontend(FILE *f, RTLIL::Design *design);
+	extern std::istream *lexin;
 	extern RTLIL::Design *current_design;
 }
 
+YOSYS_NAMESPACE_END
+
 extern int rtlil_frontend_ilang_yydebug;
 int rtlil_frontend_ilang_yylex(void);
 void rtlil_frontend_ilang_yyerror(char const *s);
 void rtlil_frontend_ilang_yyrestart(FILE *f);
 int rtlil_frontend_ilang_yyparse(void);
-void rtlil_frontend_ilang_yylex_destroy(void);
+int rtlil_frontend_ilang_yylex_destroy(void);
 int rtlil_frontend_ilang_yyget_lineno(void);
 
 #endif
diff --git a/frontends/ilang/lexer.l b/frontends/ilang/lexer.l
index 5da8ce67..4109cd4b 100644
--- a/frontends/ilang/lexer.l
+++ b/frontends/ilang/lexer.l
@@ -23,9 +23,18 @@
  */
 
 %{
-#include "kernel/rtlil.h"
+
+#ifdef __clang__
+// bison generates code using the 'register' storage class specifier
+#pragma clang diagnostic ignored "-Wdeprecated-register"
+#endif
+
+#include "ilang_frontend.h"
 #include "parser.tab.h"
-void update_autoidx(const char *p);
+
+#define YY_INPUT(buf,result,max_size) \
+        result = ILANG_FRONTEND::lexin->readsome(buf, max_size);
+
 %}
 
 %option yylineno
@@ -37,6 +46,7 @@ void update_autoidx(const char *p);
 
 %%
 
+"autoidx"	{ return TOK_AUTOIDX; }
 "module"	{ return TOK_MODULE; }
 "attribute"	{ return TOK_ATTRIBUTE; }
 "parameter"	{ return TOK_PARAMETER; }
@@ -44,6 +54,7 @@ void update_autoidx(const char *p);
 "wire"		{ return TOK_WIRE; }
 "memory"	{ return TOK_MEMORY; }
 "width"		{ return TOK_WIDTH; }
+"upto"		{ return TOK_UPTO; }
 "offset"	{ return TOK_OFFSET; }
 "size"		{ return TOK_SIZE; }
 "input"		{ return TOK_INPUT; }
@@ -69,11 +80,11 @@ void update_autoidx(const char *p);
 [a-z]+		{ return TOK_INVALID; }
 
 "\\"[^ \t\r\n]+		{ rtlil_frontend_ilang_yylval.string = strdup(yytext); return TOK_ID; }
-"$"[^ \t\r\n]+		{ rtlil_frontend_ilang_yylval.string = strdup(yytext); update_autoidx(yytext); return TOK_ID; }
+"$"[^ \t\r\n]+		{ rtlil_frontend_ilang_yylval.string = strdup(yytext); return TOK_ID; }
 "."[0-9]+		{ rtlil_frontend_ilang_yylval.string = strdup(yytext); return TOK_ID; }
 
 [0-9]+'[01xzm-]*	{ rtlil_frontend_ilang_yylval.string = strdup(yytext); return TOK_VALUE; }
-[0-9]+			{ rtlil_frontend_ilang_yylval.integer = atoi(yytext); return TOK_INT; }
+-?[0-9]+		{ rtlil_frontend_ilang_yylval.integer = atoi(yytext); return TOK_INT; }
 
 \"		{ BEGIN(STRING); }
 <STRING>\\.	{ yymore(); }
@@ -117,27 +128,6 @@ void update_autoidx(const char *p);
 
 %%
 
-void update_autoidx(const char *p)
-{
-	if (*p != '$')
-		return;
-
-	while (*p) {
-		if (*(p++) != '$')
-			continue;
-		if ('0' <= *p && *p <= '9') {
-			const char *q = p;
-			while ('0' <= *q && *q <= '9')
-				q++;
-			if ((q - p) < 10) {
-				int idx = atoi(p);
-				if (idx > RTLIL::autoidx)
-					RTLIL::autoidx = idx;
-			}
-		}
-	}
-}
-
 // this is a hack to avoid the 'yyinput defined but not used' error msgs
 void *rtlil_frontend_ilang_avoid_input_warnings() {
 	return (void*)&yyinput;
diff --git a/frontends/ilang/parser.y b/frontends/ilang/parser.y
index c2e09022..a5cc0689 100644
--- a/frontends/ilang/parser.y
+++ b/frontends/ilang/parser.y
@@ -25,7 +25,9 @@
 %{
 #include <list>
 #include "ilang_frontend.h"
+YOSYS_NAMESPACE_BEGIN
 namespace ILANG_FRONTEND {
+	std::istream *lexin;
 	RTLIL::Design *current_design;
 	RTLIL::Module *current_module;
 	RTLIL::Wire *current_wire;
@@ -37,24 +39,26 @@ namespace ILANG_FRONTEND {
 	std::map<RTLIL::IdString, RTLIL::Const> attrbuf;
 }
 using namespace ILANG_FRONTEND;
+YOSYS_NAMESPACE_END
+USING_YOSYS_NAMESPACE
 %}
 
-%name-prefix="rtlil_frontend_ilang_yy"
+%name-prefix "rtlil_frontend_ilang_yy"
 
 %union {
 	char *string;
 	int integer;
-	RTLIL::Const *data;
-	RTLIL::SigSpec *sigspec;
+	YOSYS_NAMESPACE_PREFIX RTLIL::Const *data;
+	YOSYS_NAMESPACE_PREFIX RTLIL::SigSpec *sigspec;
 }
 
 %token <string> TOK_ID TOK_VALUE TOK_STRING
 %token <integer> TOK_INT
-%token TOK_MODULE TOK_WIRE TOK_WIDTH TOK_INPUT TOK_OUTPUT TOK_INOUT
+%token TOK_AUTOIDX TOK_MODULE TOK_WIRE TOK_WIDTH TOK_INPUT TOK_OUTPUT TOK_INOUT
 %token TOK_CELL TOK_CONNECT TOK_SWITCH TOK_CASE TOK_ASSIGN TOK_SYNC
 %token TOK_LOW TOK_HIGH TOK_POSEDGE TOK_NEGEDGE TOK_EDGE TOK_ALWAYS TOK_INIT
 %token TOK_UPDATE TOK_PROCESS TOK_END TOK_INVALID TOK_EOL TOK_OFFSET
-%token TOK_PARAMETER TOK_ATTRIBUTE TOK_MEMORY TOK_SIZE TOK_SIGNED
+%token TOK_PARAMETER TOK_ATTRIBUTE TOK_MEMORY TOK_SIZE TOK_SIGNED TOK_UPTO
 
 %type <sigspec> sigspec sigspec_list
 %type <integer> sync_type
@@ -82,21 +86,23 @@ optional_eol:
 design:
 	design module |
 	design attr_stmt |
+	design autoidx_stmt |
 	/* empty */;
 
 module:
 	TOK_MODULE TOK_ID EOL {
-		if (current_design->modules.count($2) != 0)
-			rtlil_frontend_ilang_yyerror(stringf("scope error: redefinition of module %s.", $2).c_str());
+		if (current_design->has($2))
+			rtlil_frontend_ilang_yyerror(stringf("ilang error: redefinition of module %s.", $2).c_str());
 		current_module = new RTLIL::Module;
 		current_module->name = $2;
 		current_module->attributes = attrbuf;
-		current_design->modules[$2] = current_module;
+		current_design->add(current_module);
 		attrbuf.clear();
 		free($2);
 	} module_body TOK_END {
 		if (attrbuf.size() != 0)
 			rtlil_frontend_ilang_yyerror("dangling attribute");
+		current_module->fixup_ports();
 	} EOL;
 
 module_body:
@@ -113,16 +119,20 @@ attr_stmt:
 		free($2);
 	};
 
+autoidx_stmt:
+	TOK_AUTOIDX TOK_INT EOL {
+		autoidx = std::max(autoidx, $2);
+	};
+
 wire_stmt:
 	TOK_WIRE {
-		current_wire = new RTLIL::Wire;
+		current_wire = current_module->addWire("$__ilang_frontend_tmp__");
 		current_wire->attributes = attrbuf;
 		attrbuf.clear();
 	} wire_options TOK_ID EOL {
-		if (current_module->wires.count($4) != 0)
-			rtlil_frontend_ilang_yyerror(stringf("scope error: redefinition of wire %s.", $4).c_str());
-		current_wire->name = $4;
-		current_module->wires[$4] = current_wire;
+		if (current_module->wires_.count($4) != 0)
+			rtlil_frontend_ilang_yyerror(stringf("ilang error: redefinition of wire %s.", $4).c_str());
+		current_module->rename(current_wire, $4);
 		free($4);
 	};
 
@@ -130,6 +140,9 @@ wire_options:
 	wire_options TOK_WIDTH TOK_INT {
 		current_wire->width = $3;
 	} |
+	wire_options TOK_UPTO {
+		current_wire->upto = true;
+	} |
 	wire_options TOK_OFFSET TOK_INT {
 		current_wire->start_offset = $3;
 	} |
@@ -157,7 +170,7 @@ memory_stmt:
 		attrbuf.clear();
 	} memory_options TOK_ID EOL {
 		if (current_module->memories.count($4) != 0)
-			rtlil_frontend_ilang_yyerror(stringf("scope error: redefinition of memory %s.", $4).c_str());
+			rtlil_frontend_ilang_yyerror(stringf("ilang error: redefinition of memory %s.", $4).c_str());
 		current_memory->name = $4;
 		current_module->memories[$4] = current_memory;
 		free($4);
@@ -174,13 +187,10 @@ memory_options:
 
 cell_stmt:
 	TOK_CELL TOK_ID TOK_ID EOL {
-		if (current_module->cells.count($3) != 0)
-			rtlil_frontend_ilang_yyerror(stringf("scope error: redefinition of cell %s.", $3).c_str());
-		current_cell = new RTLIL::Cell;
-		current_cell->type = $2;
-		current_cell->name = $3;
+		if (current_module->cells_.count($3) != 0)
+			rtlil_frontend_ilang_yyerror(stringf("ilang error: redefinition of cell %s.", $3).c_str());
+		current_cell = current_module->addCell($3, $2);
 		current_cell->attributes = attrbuf;
-		current_module->cells[$3] = current_cell;
 		attrbuf.clear();
 		free($2);
 		free($3);
@@ -199,9 +209,9 @@ cell_body:
 		delete $5;
 	} |
 	cell_body TOK_CONNECT TOK_ID sigspec EOL {
-		if (current_cell->connections.count($3) != 0)
-			rtlil_frontend_ilang_yyerror(stringf("scope error: redefinition of cell port %s.", $3).c_str());
-		current_cell->connections[$3] = *$4;
+		if (current_cell->hasPort($3))
+			rtlil_frontend_ilang_yyerror(stringf("ilang error: redefinition of cell port %s.", $3).c_str());
+		current_cell->setPort($3, *$4);
 		delete $4;
 		free($3);
 	} |
@@ -210,7 +220,7 @@ cell_body:
 proc_stmt:
 	TOK_PROCESS TOK_ID EOL {
 		if (current_module->processes.count($2) != 0)
-			rtlil_frontend_ilang_yyerror(stringf("scope error: redefinition of process %s.", $2).c_str());
+			rtlil_frontend_ilang_yyerror(stringf("ilang error: redefinition of process %s.", $2).c_str());
 		current_process = new RTLIL::Process;
 		current_process->name = $2;
 		current_process->attributes = attrbuf;
@@ -219,6 +229,7 @@ proc_stmt:
 		switch_stack.push_back(&current_process->root_case.switches);
 		case_stack.clear();
 		case_stack.push_back(&current_process->root_case);
+		attrbuf.clear();
 		free($2);
 	} case_body sync_list TOK_END EOL;
 
@@ -350,50 +361,25 @@ constant:
 
 sigspec:
 	constant {
-		RTLIL::SigChunk chunk;
-		chunk.wire = NULL;
-		chunk.width = $1->bits.size();
-		chunk.offset = 0;
-		chunk.data = *$1;
-		$$ = new RTLIL::SigSpec;
-		$$->chunks.push_back(chunk);
-		$$->width = chunk.width;
+		$$ = new RTLIL::SigSpec(*$1);
 		delete $1;
 	} |
 	TOK_ID {
-		if (current_module->wires.count($1) == 0)
-			rtlil_frontend_ilang_yyerror(stringf("scope error: wire %s not found", $1).c_str());
-		RTLIL::SigChunk chunk;
-		chunk.wire = current_module->wires[$1];
-		chunk.width = current_module->wires[$1]->width;
-		chunk.offset = 0;
-		$$ = new RTLIL::SigSpec;
-		$$->chunks.push_back(chunk);
-		$$->width = chunk.width;
+		if (current_module->wires_.count($1) == 0)
+			rtlil_frontend_ilang_yyerror(stringf("ilang error: wire %s not found", $1).c_str());
+		$$ = new RTLIL::SigSpec(current_module->wires_[$1]);
 		free($1);
 	} |
 	TOK_ID '[' TOK_INT ']' {
-		if (current_module->wires.count($1) == 0)
-			rtlil_frontend_ilang_yyerror(stringf("scope error: wire %s not found", $1).c_str());
-		RTLIL::SigChunk chunk;
-		chunk.wire = current_module->wires[$1];
-		chunk.offset = $3;
-		chunk.width = 1;
-		$$ = new RTLIL::SigSpec;
-		$$->chunks.push_back(chunk);
-		$$->width = 1;
+		if (current_module->wires_.count($1) == 0)
+			rtlil_frontend_ilang_yyerror(stringf("ilang error: wire %s not found", $1).c_str());
+		$$ = new RTLIL::SigSpec(current_module->wires_[$1], $3);
 		free($1);
 	} |
 	TOK_ID '[' TOK_INT ':' TOK_INT ']' {
-		if (current_module->wires.count($1) == 0)
-			rtlil_frontend_ilang_yyerror(stringf("scope error: wire %s not found", $1).c_str());
-		RTLIL::SigChunk chunk;
-		chunk.wire = current_module->wires[$1];
-		chunk.width = $3 - $5 + 1;
-		chunk.offset = $5;
-		$$ = new RTLIL::SigSpec;
-		$$->chunks.push_back(chunk);
-		$$->width = chunk.width;
+		if (current_module->wires_.count($1) == 0)
+			rtlil_frontend_ilang_yyerror(stringf("ilang error: wire %s not found", $1).c_str());
+		$$ = new RTLIL::SigSpec(current_module->wires_[$1], $5, $3 - $5 + 1);
 		free($1);
 	} |
 	'{' sigspec_list '}' {
@@ -403,14 +389,8 @@ sigspec:
 sigspec_list:
 	sigspec_list sigspec {
 		$$ = new RTLIL::SigSpec;
-		for (auto it = $2->chunks.begin(); it != $2->chunks.end(); it++) {
-			$$->chunks.push_back(*it);
-			$$->width += it->width;
-		}
-		for (auto it = $1->chunks.begin(); it != $1->chunks.end(); it++) {
-			$$->chunks.push_back(*it);
-			$$->width += it->width;
-		}
+		$$->append(*$2);
+		$$->append(*$1);
 		delete $1;
 		delete $2;
 	} |
@@ -422,7 +402,7 @@ conn_stmt:
 	TOK_CONNECT sigspec sigspec EOL {
 		if (attrbuf.size() != 0)
 			rtlil_frontend_ilang_yyerror("dangling attribute");
-		current_module->connections.push_back(RTLIL::SigSig(*$2, *$3));
+		current_module->connect(*$2, *$3);
 		delete $2;
 		delete $3;
 	};