diff options
| author | Clifford Wolf <clifford@clifford.at> | 2014-07-31 13:19:47 +0200 |
|---|---|---|
| committer | Clifford Wolf <clifford@clifford.at> | 2014-07-31 13:19:47 +0200 |
| commit | 1cb25c05b37b0172dbc50e140fe20f25d973dd8a (patch) | |
| tree | 4bccb9f45ccad05346697c79afca9a1b21dced9c /frontends/verilog/verilog_frontend.cc | |
| parent | 1202f7aa4bb0f9afde157ebc4701d64e7e38abd8 (diff) | |
Moved some stuff to kernel/yosys.{h,cc}, using Yosys:: namespace
Diffstat (limited to 'frontends/verilog/verilog_frontend.cc')
| -rw-r--r-- | frontends/verilog/verilog_frontend.cc | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/frontends/verilog/verilog_frontend.cc b/frontends/verilog/verilog_frontend.cc index cbc594e8..4466e1cb 100644 --- a/frontends/verilog/verilog_frontend.cc +++ b/frontends/verilog/verilog_frontend.cc @@ -34,6 +34,7 @@ #include <sstream> #include <stdarg.h> +YOSYS_NAMESPACE_BEGIN using namespace VERILOG_FRONTEND; // use the Verilog bison/flex parser to generate an AST and use AST::process() to convert it to RTLIL @@ -376,3 +377,5 @@ struct VerilogDefaults : public Pass { } } VerilogDefaults; +YOSYS_NAMESPACE_END + |