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authorClifford Wolf <clifford@clifford.at>2014-06-16 15:00:57 +0200
committerClifford Wolf <clifford@clifford.at>2014-06-16 15:00:57 +0200
commit5bfe865cec15c12e2a9e764a0a57c01f97f8235e (patch)
treefca73ee47b4346e7725111d25e04bff92267be64 /frontends
parentb1b96d199f7d0b97d203e3fd60af698ebaf03d73 (diff)
Added found_real feature to AstNode::detectSignWidth
Diffstat (limited to 'frontends')
-rw-r--r--frontends/ast/ast.h4
-rw-r--r--frontends/ast/genrtlil.cc13
2 files changed, 11 insertions, 6 deletions
diff --git a/frontends/ast/ast.h b/frontends/ast/ast.h
index 74a476b5..f89af633 100644
--- a/frontends/ast/ast.h
+++ b/frontends/ast/ast.h
@@ -214,8 +214,8 @@ namespace AST
void dumpVlog(FILE *f, std::string indent);
// used by genRTLIL() for detecting expression width and sign
- void detectSignWidthWorker(int &width_hint, bool &sign_hint);
- void detectSignWidth(int &width_hint, bool &sign_hint);
+ void detectSignWidthWorker(int &width_hint, bool &sign_hint, bool *found_real = NULL);
+ void detectSignWidth(int &width_hint, bool &sign_hint, bool *found_real = NULL);
// create RTLIL code for this AST node
// for expressions the resulting signal vector is returned
diff --git a/frontends/ast/genrtlil.cc b/frontends/ast/genrtlil.cc
index 8a57a0ee..1f0ef445 100644
--- a/frontends/ast/genrtlil.cc
+++ b/frontends/ast/genrtlil.cc
@@ -585,7 +585,7 @@ struct AST_INTERNAL::ProcessGenerator
};
// detect sign and width of an expression
-void AstNode::detectSignWidthWorker(int &width_hint, bool &sign_hint)
+void AstNode::detectSignWidthWorker(int &width_hint, bool &sign_hint, bool *found_real)
{
std::string type_name;
bool sub_sign_hint = true;
@@ -603,6 +603,8 @@ void AstNode::detectSignWidthWorker(int &width_hint, bool &sign_hint)
break;
case AST_REALVALUE:
+ if (found_real)
+ *found_real = true;
width_hint = std::max(width_hint, 32);
break;
@@ -788,10 +790,13 @@ void AstNode::detectSignWidthWorker(int &width_hint, bool &sign_hint)
}
// detect sign and width of an expression
-void AstNode::detectSignWidth(int &width_hint, bool &sign_hint)
+void AstNode::detectSignWidth(int &width_hint, bool &sign_hint, bool *found_real)
{
- width_hint = -1, sign_hint = true;
- detectSignWidthWorker(width_hint, sign_hint);
+ width_hint = -1;
+ sign_hint = true;
+ if (found_real)
+ *found_real = false;
+ detectSignWidthWorker(width_hint, sign_hint, found_real);
}
// create RTLIL from an AST node