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authorClifford Wolf <clifford@clifford.at>2014-01-03 00:22:17 +0100
committerClifford Wolf <clifford@clifford.at>2014-01-03 00:22:17 +0100
commitfb2bf934dc6d2c969906b350c9a1b09a972bfdd7 (patch)
treeea47a664de2af51f09fe43f3040685438f5dd2ec /frontends
parent536e20bde159db3ad8c77aeb9001a8dddde884a8 (diff)
Added correct handling of $memwr priority
Diffstat (limited to 'frontends')
-rw-r--r--frontends/ast/genrtlil.cc2
1 files changed, 2 insertions, 0 deletions
diff --git a/frontends/ast/genrtlil.cc b/frontends/ast/genrtlil.cc
index 1b6fc1d8..e44b2d36 100644
--- a/frontends/ast/genrtlil.cc
+++ b/frontends/ast/genrtlil.cc
@@ -1271,6 +1271,8 @@ RTLIL::SigSpec AstNode::genRTLIL(int width_hint, bool sign_hint)
cell->parameters["\\CLK_ENABLE"] = RTLIL::Const(0);
cell->parameters["\\CLK_POLARITY"] = RTLIL::Const(0);
+
+ cell->parameters["\\PRIORITY"] = RTLIL::Const(RTLIL::autoidx-1);
}
break;