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authorClifford Wolf <clifford@clifford.at>2014-07-31 16:38:54 +0200
committerClifford Wolf <clifford@clifford.at>2014-07-31 16:38:54 +0200
commitcdae8abe16847c533171fed111beea7b52202cce (patch)
treebf8dddb4a4ca4d70c83603ef61b2d22cb95d153a /kernel/consteval.h
parentb5a9e51b966abdfedc9309defa79b5141928e84a (diff)
Renamed port access function on RTLIL::Cell, added param access functions
Diffstat (limited to 'kernel/consteval.h')
-rw-r--r--kernel/consteval.h16
1 files changed, 8 insertions, 8 deletions
diff --git a/kernel/consteval.h b/kernel/consteval.h
index e5cae102..529d8962 100644
--- a/kernel/consteval.h
+++ b/kernel/consteval.h
@@ -87,22 +87,22 @@ struct ConstEval
{
RTLIL::SigSpec sig_a, sig_b, sig_s, sig_y;
- log_assert(cell->has("\\Y"));
- sig_y = values_map(assign_map(cell->get("\\Y")));
+ log_assert(cell->hasPort("\\Y"));
+ sig_y = values_map(assign_map(cell->getPort("\\Y")));
if (sig_y.is_fully_const())
return true;
- if (cell->has("\\S")) {
- sig_s = cell->get("\\S");
+ if (cell->hasPort("\\S")) {
+ sig_s = cell->getPort("\\S");
if (!eval(sig_s, undef, cell))
return false;
}
- if (cell->has("\\A"))
- sig_a = cell->get("\\A");
+ if (cell->hasPort("\\A"))
+ sig_a = cell->getPort("\\A");
- if (cell->has("\\B"))
- sig_b = cell->get("\\B");
+ if (cell->hasPort("\\B"))
+ sig_b = cell->getPort("\\B");
if (cell->type == "$mux" || cell->type == "$pmux" || cell->type == "$safe_pmux" || cell->type == "$_MUX_")
{