diff options
| author | Clifford Wolf <clifford@clifford.at> | 2014-07-28 11:08:55 +0200 |
|---|---|---|
| committer | Clifford Wolf <clifford@clifford.at> | 2014-07-28 11:27:48 +0200 |
| commit | 7bd2d1064f2eceddc3c93c121c4154a2f594a040 (patch) | |
| tree | 563de1df5e323d0f217a51e29acb56c9e9f1327d /kernel/consteval.h | |
| parent | d86a25f145012ccb6b2048af3aae22f13b97b505 (diff) | |
Using log_assert() instead of assert()
Diffstat (limited to 'kernel/consteval.h')
| -rw-r--r-- | kernel/consteval.h | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/kernel/consteval.h b/kernel/consteval.h index 1727d91c..e5cae102 100644 --- a/kernel/consteval.h +++ b/kernel/consteval.h @@ -72,7 +72,7 @@ struct ConstEval #ifndef NDEBUG RTLIL::SigSpec current_val = values_map(sig); for (int i = 0; i < SIZE(current_val); i++) - assert(current_val[i].wire != NULL || current_val[i] == value.bits[i]); + log_assert(current_val[i].wire != NULL || current_val[i] == value.bits[i]); #endif values_map.add(sig, RTLIL::SigSpec(value)); } @@ -87,7 +87,7 @@ struct ConstEval { RTLIL::SigSpec sig_a, sig_b, sig_s, sig_y; - assert(cell->has("\\Y")); + log_assert(cell->has("\\Y")); sig_y = values_map(assign_map(cell->get("\\Y"))); if (sig_y.is_fully_const()) return true; @@ -133,7 +133,7 @@ struct ConstEval std::vector<RTLIL::Const> y_values; - assert(y_candidates.size() > 0); + log_assert(y_candidates.size() > 0); for (auto &yc : y_candidates) { if (!eval(yc, undef, cell)) return false; @@ -146,7 +146,7 @@ struct ConstEval for (size_t i = 1; i < y_values.size(); i++) { std::vector<RTLIL::State> &slave_bits = y_values.at(i).bits; - assert(master_bits.size() == slave_bits.size()); + log_assert(master_bits.size() == slave_bits.size()); for (size_t j = 0; j < master_bits.size(); j++) if (master_bits[j] != slave_bits[j]) master_bits[j] = RTLIL::State::Sx; |