Added dict/pool.sort()

1 files changed, 30 insertions, 0 deletions

diff --git a/kernel/rtlil.cc b/kernel/rtlil.cc
index aea99347..3fb98d1e 100644
--- a/kernel/rtlil.cc
+++ b/kernel/rtlil.cc
@@ -373,6 +373,14 @@ void RTLIL::Design::remove(RTLIL::Module *module)
 	delete module;
 }
 
+void RTLIL::Design::sort()
+{
+	scratchpad.sort();
+	modules_.sort(sort_by_id_str());
+	for (auto &it : modules_)
+		it.second->sort();
+}
+
 void RTLIL::Design::check()
 {
 #ifndef NDEBUG
@@ -976,6 +984,21 @@ namespace {
 }
 #endif
 
+void RTLIL::Module::sort()
+{
+	wires_.sort(sort_by_id_str());
+	cells_.sort(sort_by_id_str());
+	avail_parameters.sort(sort_by_id_str());
+	memories.sort(sort_by_id_str());
+	processes.sort(sort_by_id_str());
+	for (auto &it : cells_)
+		it.second->sort();
+	for (auto &it : wires_)
+		it.second->attributes.sort(sort_by_id_str());
+	for (auto &it : memories)
+		it.second->attributes.sort(sort_by_id_str());
+}
+
 void RTLIL::Module::check()
 {
 #ifndef NDEBUG
@@ -1908,6 +1931,13 @@ const RTLIL::Const &RTLIL::Cell::getParam(RTLIL::IdString paramname) const
 	return parameters.at(paramname);
 }
 
+void RTLIL::Cell::sort()
+{
+	connections_.sort(sort_by_id_str());
+	parameters.sort(sort_by_id_str());
+	attributes.sort(sort_by_id_str());
+}
+
 void RTLIL::Cell::check()
 {
 #ifndef NDEBUG