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authorClifford Wolf <clifford@clifford.at>2014-02-07 17:44:57 +0100
committerClifford Wolf <clifford@clifford.at>2014-02-07 17:44:57 +0100
commitfc3b3c4ec3955b165166d9f44965fac0e1879505 (patch)
tree2552ece4d6e1709f7ef17d838b00f7f774faf95b /kernel
parenta1ac710ab8740ae781e0274f63633e8ed2650da4 (diff)
Added $slice and $concat cell types
Diffstat (limited to 'kernel')
-rw-r--r--kernel/celltypes.h19
-rw-r--r--kernel/rtlil.cc18
-rw-r--r--kernel/satgen.h21
3 files changed, 54 insertions, 4 deletions
diff --git a/kernel/celltypes.h b/kernel/celltypes.h
index 9e63e9d1..24504aee 100644
--- a/kernel/celltypes.h
+++ b/kernel/celltypes.h
@@ -270,6 +270,20 @@ struct CellTypes
static RTLIL::Const eval(RTLIL::Cell *cell, const RTLIL::Const &arg1, const RTLIL::Const &arg2)
{
+ if (cell->type == "$slice") {
+ RTLIL::Const ret;
+ int width = cell->parameters.at("\\Y_WIDTH").as_int();
+ int offset = cell->parameters.at("\\OFFSET").as_int();
+ ret.bits.insert(ret.bits.end(), arg1.bits.begin()+offset, arg1.bits.begin()+offset+width);
+ return ret;
+ }
+
+ if (cell->type == "$concat") {
+ RTLIL::Const ret = arg1;
+ ret.bits.insert(ret.bits.end(), arg2.bits.begin(), arg2.bits.end());
+ return ret;
+ }
+
bool signed_a = cell->parameters.count("\\A_SIGNED") > 0 && cell->parameters["\\A_SIGNED"].as_bool();
bool signed_b = cell->parameters.count("\\B_SIGNED") > 0 && cell->parameters["\\B_SIGNED"].as_bool();
int result_len = cell->parameters.count("\\Y_WIDTH") > 0 ? cell->parameters["\\Y_WIDTH"].as_int() : -1;
@@ -289,10 +303,7 @@ struct CellTypes
}
assert(sel.bits.size() == 0);
- bool signed_a = cell->parameters.count("\\A_SIGNED") > 0 && cell->parameters["\\A_SIGNED"].as_bool();
- bool signed_b = cell->parameters.count("\\B_SIGNED") > 0 && cell->parameters["\\B_SIGNED"].as_bool();
- int result_len = cell->parameters.count("\\Y_WIDTH") > 0 ? cell->parameters["\\Y_WIDTH"].as_int() : -1;
- return eval(cell->type, arg1, arg2, signed_a, signed_b, result_len);
+ return eval(cell, arg1, arg2);
}
};
diff --git a/kernel/rtlil.cc b/kernel/rtlil.cc
index 12aa35df..4c944c93 100644
--- a/kernel/rtlil.cc
+++ b/kernel/rtlil.cc
@@ -462,6 +462,24 @@ namespace {
return;
}
+ if (cell->type == "$slice") {
+ param("\\OFFSET");
+ port("\\A", param("\\A_WIDTH"));
+ port("\\Y", param("\\Y_WIDTH"));
+ if (param("\\OFFSET") + param("\\Y_WIDTH") > param("\\A_WIDTH"))
+ error(__LINE__);
+ check_expected();
+ return;
+ }
+
+ if (cell->type == "$concat") {
+ port("\\A", param("\\A_WIDTH"));
+ port("\\B", param("\\B_WIDTH"));
+ port("\\Y", param("\\A_WIDTH") + param("\\B_WIDTH"));
+ check_expected();
+ return;
+ }
+
if (cell->type == "$mux") {
port("\\A", param("\\WIDTH"));
port("\\B", param("\\WIDTH"));
diff --git a/kernel/satgen.h b/kernel/satgen.h
index 473aa616..840700cb 100644
--- a/kernel/satgen.h
+++ b/kernel/satgen.h
@@ -761,6 +761,27 @@ struct SatGen
return true;
}
+ if (cell->type == "$slice")
+ {
+ RTLIL::SigSpec a = cell->connections.at("\\A");
+ RTLIL::SigSpec y = cell->connections.at("\\Y");
+ ez->assume(signals_eq(a.extract(cell->parameters.at("\\OFFSET").as_int(), y.width), y, timestep));
+ return true;
+ }
+
+ if (cell->type == "$concat")
+ {
+ RTLIL::SigSpec a = cell->connections.at("\\A");
+ RTLIL::SigSpec b = cell->connections.at("\\B");
+ RTLIL::SigSpec y = cell->connections.at("\\Y");
+
+ RTLIL::SigSpec ab = a;
+ ab.append(b);
+
+ ez->assume(signals_eq(ab, y, timestep));
+ return true;
+ }
+
if (timestep > 0 && (cell->type == "$dff" || cell->type == "$_DFF_N_" || cell->type == "$_DFF_P_"))
{
if (timestep == 1)