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author | Clifford Wolf <clifford@clifford.at> | 2014-02-05 15:06:13 +0100 |
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committer | Clifford Wolf <clifford@clifford.at> | 2014-02-05 15:06:13 +0100 |
commit | 3b5c462273686d7d479a988718a26468f0bc3ef5 (patch) | |
tree | dcb174e16064a87fdb3561e1d280c99af66b30d1 /manual/PRESENTATION_ExSyn.tex | |
parent | 9f6364c1c4f268043536adf1b675da0994ee268e (diff) |
presentation progress
Diffstat (limited to 'manual/PRESENTATION_ExSyn.tex')
-rw-r--r-- | manual/PRESENTATION_ExSyn.tex | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/manual/PRESENTATION_ExSyn.tex b/manual/PRESENTATION_ExSyn.tex index f183da93..9aa9bfeb 100644 --- a/manual/PRESENTATION_ExSyn.tex +++ b/manual/PRESENTATION_ExSyn.tex @@ -348,7 +348,7 @@ Finally the {\tt fsm\_map} command can be used to convert the (optimized) {\tt \begin{frame}[t]{\subsecname} \vbox to 0cm{\includegraphics[width=12cm,trim=-18cm 0cm 0cm -34cm]{PRESENTATION_ExSyn/techmap_01.pdf}\vss} \vskip-0.8cm -The {\tt techmap} command replaces cells with an implementations given as +The {\tt techmap} command replaces cells with implementations given as verilog source. For example implementing a 32 bit adder using 16 bit adders: \vbox to 0cm{ |