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| author | Clifford Wolf <clifford@clifford.at> | 2014-06-21 16:33:33 +0200 |
|---|---|---|
| committer | Clifford Wolf <clifford@clifford.at> | 2014-06-21 16:33:33 +0200 |
| commit | b18fa95d2f1f4118cdb7c16e3415059bd81e2325 (patch) | |
| tree | 68ba5ef340312a0d5f3a63108dddf034e8e6dba6 /manual/PRESENTATION_ExSyn.tex | |
| parent | 1c85584fe5843a43590de3927fe9bde74a04e72e (diff) | |
Progress in presentation
Diffstat (limited to 'manual/PRESENTATION_ExSyn.tex')
| -rw-r--r-- | manual/PRESENTATION_ExSyn.tex | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/manual/PRESENTATION_ExSyn.tex b/manual/PRESENTATION_ExSyn.tex index 432ce368..d1d8abe4 100644 --- a/manual/PRESENTATION_ExSyn.tex +++ b/manual/PRESENTATION_ExSyn.tex @@ -346,7 +346,7 @@ Finally the {\tt fsm\_map} command can be used to convert the (optimized) {\tt \subsection{The {\tt techmap} command} \begin{frame}[t]{\subsecname} -\vbox to 0cm{\includegraphics[width=12cm,trim=-18cm 0cm 0cm -34cm]{PRESENTATION_ExSyn/techmap_01.pdf}\vss} +\vbox to 0cm{\includegraphics[width=12cm,trim=-15cm 0cm 0cm -20cm]{PRESENTATION_ExSyn/techmap_01.pdf}\vss} \vskip-0.8cm The {\tt techmap} command replaces cells with implementations given as verilog source. For example implementing a 32 bit adder using 16 bit adders: |