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authorClifford Wolf <clifford@clifford.at>2013-07-23 16:19:34 +0200
committerClifford Wolf <clifford@clifford.at>2013-07-23 16:19:34 +0200
commitad9bbcbf40451231178ccce67ab5aaff37da81da (patch)
treec35b9450a6ffe33d8388fb572fdcbc6a806bc0c5 /passes/abc/blifparse.h
parentd815f1c77016a50a58260188283918c7aec958ae (diff)
Added $lut cells and abc lut mapping support
Diffstat (limited to 'passes/abc/blifparse.h')
-rw-r--r--passes/abc/blifparse.h28
1 files changed, 28 insertions, 0 deletions
diff --git a/passes/abc/blifparse.h b/passes/abc/blifparse.h
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+++ b/passes/abc/blifparse.h
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+/*
+ * yosys -- Yosys Open SYnthesis Suite
+ *
+ * Copyright (C) 2012 Clifford Wolf <clifford@clifford.at>
+ *
+ * Permission to use, copy, modify, and/or distribute this software for any
+ * purpose with or without fee is hereby granted, provided that the above
+ * copyright notice and this permission notice appear in all copies.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
+ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
+ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
+ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+ *
+ */
+
+#ifndef ABC_BLIFPARSE
+#define ABC_BLIFPARSE
+
+#include "kernel/rtlil.h"
+
+extern RTLIL::Design *abc_parse_blif(FILE *f);
+
+#endif
+