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authorClifford Wolf <clifford@clifford.at>2014-07-23 15:36:09 +0200
committerClifford Wolf <clifford@clifford.at>2014-07-23 15:36:09 +0200
commit4e802eb7f6fe5858f8657be7cd3e6638cc0f2ece (patch)
tree917ce7eece77475cfc632f3d41f5fb8aadef64d2 /passes/cmds
parent85db102e13bbd6decda3f99ef640d0991ee24b33 (diff)
Fixed all users of SigSpec::chunks_rw() and removed it
Diffstat (limited to 'passes/cmds')
-rw-r--r--passes/cmds/delete.cc5
-rw-r--r--passes/cmds/setundef.cc57
-rw-r--r--passes/cmds/splitnets.cc8
3 files changed, 34 insertions, 36 deletions
diff --git a/passes/cmds/delete.cc b/passes/cmds/delete.cc
index f433c4b4..7fe95b0a 100644
--- a/passes/cmds/delete.cc
+++ b/passes/cmds/delete.cc
@@ -27,12 +27,13 @@ struct DeleteWireWorker
std::set<std::string> *delete_wires_p;
void operator()(RTLIL::SigSpec &sig) {
- sig.optimize();
- for (auto &c : sig.chunks_rw())
+ std::vector<RTLIL::SigChunk> chunks = sig;
+ for (auto &c : chunks)
if (c.wire != NULL && delete_wires_p->count(c.wire->name)) {
c.wire = module->addWire(NEW_ID, c.width);
c.offset = 0;
}
+ sig = chunks;
}
};
diff --git a/passes/cmds/setundef.cc b/passes/cmds/setundef.cc
index 619930b3..63d5bb9a 100644
--- a/passes/cmds/setundef.cc
+++ b/passes/cmds/setundef.cc
@@ -23,35 +23,33 @@
#include "kernel/rtlil.h"
#include "kernel/log.h"
-static int next_bit_mode;
-static uint32_t next_bit_state;
-
-static RTLIL::State next_bit()
+struct SetundefWorker
{
- if (next_bit_mode == 0)
- return RTLIL::State::S0;
+ int next_bit_mode;
+ uint32_t next_bit_state;
- if (next_bit_mode == 1)
- return RTLIL::State::S1;
+ RTLIL::State next_bit()
+ {
+ if (next_bit_mode == 0)
+ return RTLIL::State::S0;
- // xorshift32
- next_bit_state ^= next_bit_state << 13;
- next_bit_state ^= next_bit_state >> 17;
- next_bit_state ^= next_bit_state << 5;
- log_assert(next_bit_state != 0);
+ if (next_bit_mode == 1)
+ return RTLIL::State::S1;
- return ((next_bit_state >> (next_bit_state & 15)) & 16) ? RTLIL::State::S0 : RTLIL::State::S1;
-}
+ // xorshift32
+ next_bit_state ^= next_bit_state << 13;
+ next_bit_state ^= next_bit_state >> 17;
+ next_bit_state ^= next_bit_state << 5;
+ log_assert(next_bit_state != 0);
+
+ return ((next_bit_state >> (next_bit_state & 15)) & 16) ? RTLIL::State::S0 : RTLIL::State::S1;
+ }
-struct SetundefWorker
-{
void operator()(RTLIL::SigSpec &sig)
{
- sig.expand();
- for (auto &c : sig.chunks_rw())
- if (c.wire == NULL && c.data.bits.at(0) > RTLIL::State::S1)
- c.data.bits.at(0) = next_bit();
- sig.optimize();
+ for (auto &bit : sig)
+ if (bit.wire == NULL && bit.data > RTLIL::State::S1)
+ bit = next_bit();
}
};
@@ -83,6 +81,7 @@ struct SetundefPass : public Pass {
{
bool got_value = false;
bool undriven_mode = false;
+ SetundefWorker worker;
size_t argidx;
for (argidx = 1; argidx < args.size(); argidx++)
@@ -93,20 +92,20 @@ struct SetundefPass : public Pass {
}
if (args[argidx] == "-zero") {
got_value = true;
- next_bit_mode = 0;
+ worker.next_bit_mode = 0;
continue;
}
if (args[argidx] == "-one") {
got_value = true;
- next_bit_mode = 1;
+ worker.next_bit_mode = 1;
continue;
}
if (args[argidx] == "-random" && !got_value && argidx+1 < args.size()) {
got_value = true;
- next_bit_mode = 2;
- next_bit_state = atoi(args[++argidx].c_str()) + 1;
+ worker.next_bit_mode = 2;
+ worker.next_bit_state = atoi(args[++argidx].c_str()) + 1;
for (int i = 0; i < 10; i++)
- next_bit();
+ worker.next_bit();
continue;
}
break;
@@ -144,13 +143,13 @@ struct SetundefPass : public Pass {
for (auto &c : sig.chunks()) {
RTLIL::SigSpec bits;
for (int i = 0; i < c.width; i++)
- bits.append(next_bit());
+ bits.append(worker.next_bit());
bits.optimize();
module->connections.push_back(RTLIL::SigSig(c, bits));
}
}
- module->rewrite_sigspecs(SetundefWorker());
+ module->rewrite_sigspecs(worker);
}
}
} SetundefPass;
diff --git a/passes/cmds/splitnets.cc b/passes/cmds/splitnets.cc
index d71e9727..c40ff2c4 100644
--- a/passes/cmds/splitnets.cc
+++ b/passes/cmds/splitnets.cc
@@ -62,11 +62,9 @@ struct SplitnetsWorker
void operator()(RTLIL::SigSpec &sig)
{
- sig.expand();
- for (auto &c : sig.chunks_rw())
- if (splitmap.count(c.wire) > 0)
- c = splitmap.at(c.wire).at(c.offset);
- sig.optimize();
+ for (auto &bit : sig)
+ if (splitmap.count(bit.wire) > 0)
+ bit = splitmap.at(bit.wire).at(bit.offset);
}
};