summaryrefslogtreecommitdiff
path: root/passes/equiv
diff options
context:
space:
mode:
authorClifford Wolf <clifford@clifford.at>2015-10-23 15:26:58 +0200
committerClifford Wolf <clifford@clifford.at>2015-10-23 15:26:58 +0200
commit15a67392f10263b59d34021b08fbb48685d7ec16 (patch)
tree76e4d421b5a54de468b191197b7b649c5f48ba73 /passes/equiv
parentd19069b0fbe5aa2be75c6a9d27bffd3a502f416b (diff)
Also merge $equiv cells in equiv_struct
Diffstat (limited to 'passes/equiv')
-rw-r--r--passes/equiv/equiv_struct.cc1
1 files changed, 1 insertions, 0 deletions
diff --git a/passes/equiv/equiv_struct.cc b/passes/equiv/equiv_struct.cc
index ff844ea2..c509e255 100644
--- a/passes/equiv/equiv_struct.cc
+++ b/passes/equiv/equiv_struct.cc
@@ -119,6 +119,7 @@ struct EquivStructWorker
for (auto cell : module->selected_cells())
if (cell->type == "$equiv") {
equiv_bits.add(sigmap(cell->getPort("\\A")), sigmap(cell->getPort("\\B")));
+ cells_by_type[cell->type].insert(cell->name);
} else
if (module->design->selected(module, cell)) {
if (mode_icells || module->design->module(cell->type))