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authorClifford Wolf <clifford@clifford.at>2015-10-21 15:42:50 +0200
committerClifford Wolf <clifford@clifford.at>2015-10-21 15:42:50 +0200
commit6416dfee9380c03f9391784d885caebfed0072b4 (patch)
tree219ca5a0ca9a140f6409639ea116000928419ec4 /passes/equiv
parentbbcbf739e68f075d81d34603b4d06d9bd3deaf0a (diff)
Improved inout handling in equiv_make
Diffstat (limited to 'passes/equiv')
-rw-r--r--passes/equiv/equiv_make.cc2
1 files changed, 1 insertions, 1 deletions
diff --git a/passes/equiv/equiv_make.cc b/passes/equiv/equiv_make.cc
index c001fdbf..8b063c54 100644
--- a/passes/equiv/equiv_make.cc
+++ b/passes/equiv/equiv_make.cc
@@ -280,7 +280,7 @@ struct EquivMakeWorker
for (auto c : cells_list)
for (auto &conn : c->connections())
- if (ct.cell_input(c->type, conn.first)) {
+ if (!ct.cell_output(c->type, conn.first)) {
SigSpec old_sig = assign_map(conn.second);
SigSpec new_sig = rd_signal_map(old_sig);
if (old_sig != new_sig) {