summaryrefslogtreecommitdiff
path: root/passes/fsm/fsm_detect.cc
diff options
context:
space:
mode:
authorRuben Undheim <ruben.undheim@gmail.com>2018-10-17 18:18:09 +0200
committerRuben Undheim <ruben.undheim@gmail.com>2018-10-17 18:18:46 +0200
commit21b42cdffcb5b24bf467ecf2b74adea47bbdc393 (patch)
tree5794a304e60e2060a34a6eaa076230c71de2001e /passes/fsm/fsm_detect.cc
parent42942203476b47ac8ec62671e4c133b7c7fceab3 (diff)
parent0b254e3191dbed4a29ee37c5ae7cfcf8d723fbb2 (diff)
Merge branch 'next'
Diffstat (limited to 'passes/fsm/fsm_detect.cc')
-rw-r--r--passes/fsm/fsm_detect.cc8
1 files changed, 4 insertions, 4 deletions
diff --git a/passes/fsm/fsm_detect.cc b/passes/fsm/fsm_detect.cc
index 6a560f16..fc504e98 100644
--- a/passes/fsm/fsm_detect.cc
+++ b/passes/fsm/fsm_detect.cc
@@ -180,7 +180,7 @@ static void detect_fsm(RTLIL::Wire *wire)
for (auto &port_it : cell->connections())
if (cell->output(port_it.first)) {
SigSpec sig = assign_map(port_it.second);
- Const val(set_output ? State::S1 : State::S0, GetSize(sig));
+ Const val(set_output ? State::S1 : State::S0, GetSize(sig));
ce.set(sig, val);
}
}
@@ -215,7 +215,7 @@ static void detect_fsm(RTLIL::Wire *wire)
for (auto w : warnings) warnmsg += " " + w;
log_warning("%s", warnmsg.c_str());
} else {
- log("FSM state register %s.%s already has fsm_encoding attribute.\n", log_id(wire->module), log_id(wire));
+ log("FSM state register %s.%s already has fsm_encoding attribute.\n", log_id(wire->module), log_id(wire));
}
}
else
@@ -245,7 +245,7 @@ static void detect_fsm(RTLIL::Wire *wire)
struct FsmDetectPass : public Pass {
FsmDetectPass() : Pass("fsm_detect", "finding FSMs in design") { }
- virtual void help()
+ void help() YS_OVERRIDE
{
// |---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|
log("\n");
@@ -261,7 +261,7 @@ struct FsmDetectPass : public Pass {
log("'fsm_encoding' attribute to \"none\".\n");
log("\n");
}
- virtual void execute(std::vector<std::string> args, RTLIL::Design *design)
+ void execute(std::vector<std::string> args, RTLIL::Design *design) YS_OVERRIDE
{
log_header(design, "Executing FSM_DETECT pass (finding FSMs in design).\n");
extra_args(args, 1, design);