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authorClifford Wolf <clifford@clifford.at>2015-09-21 11:52:40 +0200
committerClifford Wolf <clifford@clifford.at>2015-09-21 11:54:00 +0200
commitb66bf8bed17473b0b972671fe3c4f4c5d147e68a (patch)
tree53ec655f2ab4a7a6c07dd2861124b2179cca97ce /passes/fsm/fsm_detect.cc
parent11c27b5e69fc74ff147309e550b67fd9cddb5f80 (diff)
Do not detect fsm state registers with init attribute
Diffstat (limited to 'passes/fsm/fsm_detect.cc')
-rw-r--r--passes/fsm/fsm_detect.cc2
1 files changed, 2 insertions, 0 deletions
diff --git a/passes/fsm/fsm_detect.cc b/passes/fsm/fsm_detect.cc
index fd0ae44b..740113e3 100644
--- a/passes/fsm/fsm_detect.cc
+++ b/passes/fsm/fsm_detect.cc
@@ -110,6 +110,8 @@ static bool check_state_users(RTLIL::SigSpec sig)
static void detect_fsm(RTLIL::Wire *wire)
{
+ if (wire->attributes.count("\\init") > 0)
+ return;
if (wire->attributes.count("\\fsm_encoding") > 0 || wire->width <= 1)
return;
if (sig_at_port.check_any(assign_map(RTLIL::SigSpec(wire))))