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authorClifford Wolf <clifford@clifford.at>2014-07-26 15:57:57 +0200
committerClifford Wolf <clifford@clifford.at>2014-07-26 15:58:23 +0200
commitf8fdc47d3361c1a3445a9357ca26cfe75907d6b0 (patch)
treee4b1c2f97db2c317f8b986635141dfd7bb8e78d8 /passes/fsm
parentb7dda723022ad00c6c0089be888eab319953faa8 (diff)
Manual fixes for new cell connections API
Diffstat (limited to 'passes/fsm')
-rw-r--r--passes/fsm/fsm_expand.cc8
-rw-r--r--passes/fsm/fsm_extract.cc4
-rw-r--r--passes/fsm/fsm_opt.cc14
3 files changed, 17 insertions, 9 deletions
diff --git a/passes/fsm/fsm_expand.cc b/passes/fsm/fsm_expand.cc
index 126c4866..ed80d7c3 100644
--- a/passes/fsm/fsm_expand.cc
+++ b/passes/fsm/fsm_expand.cc
@@ -167,10 +167,14 @@ struct FsmExpand
fsm_data.copy_from_cell(fsm_cell);
fsm_data.num_inputs += input_sig.size();
- fsm_cell->get("\\CTRL_IN").append(input_sig);
+ RTLIL::SigSpec new_ctrl_in = fsm_cell->get("\\CTRL_IN");
+ new_ctrl_in.append(input_sig);
+ fsm_cell->set("\\CTRL_IN", new_ctrl_in);
fsm_data.num_outputs += output_sig.size();
- fsm_cell->get("\\CTRL_OUT").append(output_sig);
+ RTLIL::SigSpec new_ctrl_out = fsm_cell->get("\\CTRL_OUT");
+ new_ctrl_out.append(output_sig);
+ fsm_cell->set("\\CTRL_OUT", new_ctrl_out);
std::vector<FsmData::transition_t> new_transition_table;
for (auto &tr : fsm_data.transition_table) {
diff --git a/passes/fsm/fsm_extract.cc b/passes/fsm/fsm_extract.cc
index 3ded8aca..e89bba89 100644
--- a/passes/fsm/fsm_extract.cc
+++ b/passes/fsm/fsm_extract.cc
@@ -294,13 +294,13 @@ static void extract_fsm(RTLIL::Wire *wire)
sig2driver.find(ctrl_out, cellport_list);
for (auto &cellport : cellport_list) {
RTLIL::Cell *cell = module->cells.at(cellport.first);
- RTLIL::SigSpec port_sig = assign_map(cell->connections()[cellport.second]);
+ RTLIL::SigSpec port_sig = assign_map(cell->get(cellport.second));
RTLIL::SigSpec unconn_sig = port_sig.extract(ctrl_out);
RTLIL::Wire *unconn_wire = new RTLIL::Wire;
unconn_wire->name = stringf("$fsm_unconnect$%s$%d", log_signal(unconn_sig), RTLIL::autoidx++);
unconn_wire->width = unconn_sig.size();
module->wires[unconn_wire->name] = unconn_wire;
- port_sig.replace(unconn_sig, RTLIL::SigSpec(unconn_wire), &cell->connections()[cellport.second]);
+ port_sig.replace(unconn_sig, RTLIL::SigSpec(unconn_wire), &cell->connections_[cellport.second]);
}
}
diff --git a/passes/fsm/fsm_opt.cc b/passes/fsm/fsm_opt.cc
index e82b5363..1441378a 100644
--- a/passes/fsm/fsm_opt.cc
+++ b/passes/fsm/fsm_opt.cc
@@ -79,7 +79,9 @@ struct FsmOpt
tmp.remove(i, 1);
tr.ctrl_in = tmp.as_const();
}
- cell->get("\\CTRL_IN").remove(i, 1);
+ RTLIL::SigSpec new_ctrl_in = cell->get("\\CTRL_IN");
+ new_ctrl_in.remove(i, 1);
+ cell->set("\\CTRL_IN", new_ctrl_in);
fsm_data.num_inputs--;
}
}
@@ -94,7 +96,9 @@ struct FsmOpt
RTLIL::SigSpec sig = cell->get("\\CTRL_OUT").extract(i, 1);
if (signal_is_unused(sig)) {
log(" Removing unused output signal %s.\n", log_signal(sig));
- cell->get("\\CTRL_OUT").remove(i, 1);
+ RTLIL::SigSpec new_ctrl_out = cell->get("\\CTRL_OUT");
+ new_ctrl_out.remove(i, 1);
+ cell->set("\\CTRL_OUT", new_ctrl_out);
for (auto &tr : fsm_data.transition_table) {
RTLIL::SigSpec tmp(tr.ctrl_out);
tmp.remove(i, 1);
@@ -108,7 +112,7 @@ struct FsmOpt
void opt_alias_inputs()
{
- RTLIL::SigSpec &ctrl_in = cell->get("\\CTRL_IN");
+ RTLIL::SigSpec &ctrl_in = cell->connections_["\\CTRL_IN"];
for (int i = 0; i < ctrl_in.size(); i++)
for (int j = i+1; j < ctrl_in.size(); j++)
@@ -145,8 +149,8 @@ struct FsmOpt
void opt_feedback_inputs()
{
- RTLIL::SigSpec &ctrl_in = cell->get("\\CTRL_IN");
- RTLIL::SigSpec &ctrl_out = cell->get("\\CTRL_OUT");
+ RTLIL::SigSpec &ctrl_in = cell->connections_["\\CTRL_IN"];
+ RTLIL::SigSpec &ctrl_out = cell->connections_["\\CTRL_OUT"];
for (int j = 0; j < ctrl_out.size(); j++)
for (int i = 0; i < ctrl_in.size(); i++)