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authorClifford Wolf <clifford@clifford.at>2013-11-24 17:17:21 +0100
committerClifford Wolf <clifford@clifford.at>2013-11-24 17:17:21 +0100
commit609caa23b5e12547c043dc4a1827d1a531af1992 (patch)
tree297e7d5b77b28eebccc3bd8e7af318f174165744 /passes/hierarchy
parent1e6836933d8b74d391f816ccdcf71c972f8b1db1 (diff)
Implemented correct handling of signed module parameters
Diffstat (limited to 'passes/hierarchy')
-rw-r--r--passes/hierarchy/hierarchy.cc2
1 files changed, 1 insertions, 1 deletions
diff --git a/passes/hierarchy/hierarchy.cc b/passes/hierarchy/hierarchy.cc
index d9b52c6d..291df184 100644
--- a/passes/hierarchy/hierarchy.cc
+++ b/passes/hierarchy/hierarchy.cc
@@ -150,7 +150,7 @@ static bool expand_module(RTLIL::Design *design, RTLIL::Module *module, bool fla
if (design->modules.at(cell->type)->get_bool_attribute("\\blackbox"))
continue;
RTLIL::Module *mod = design->modules[cell->type];
- cell->type = mod->derive(design, cell->parameters);
+ cell->type = mod->derive(design, cell->parameters, cell->signed_parameters);
cell->parameters.clear();
did_something = true;
}