diff options
author | Ruben Undheim <ruben.undheim@gmail.com> | 2018-08-30 20:46:22 +0200 |
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committer | Ruben Undheim <ruben.undheim@gmail.com> | 2018-08-30 20:46:22 +0200 |
commit | 78bfe0de96fa5c6a7e53689ef53deaeac1d0a7b8 (patch) | |
tree | cc36d8cc573f1e6cc9b15ccc85a66883356cbf5f /passes/memory/memory_map.cc | |
parent | 291bd6d9b3f51ea86c38bbe998c0896ad8b9fed2 (diff) | |
parent | 5033b51947a6ef02cb785b5622e993335efa750a (diff) |
Merge tag 'upstream/0.7+20180830git0b7a184'
Upstream version 0.7+20180830git0b7a184
Diffstat (limited to 'passes/memory/memory_map.cc')
-rw-r--r-- | passes/memory/memory_map.cc | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/passes/memory/memory_map.cc b/passes/memory/memory_map.cc index bffeec85..a0b808e5 100644 --- a/passes/memory/memory_map.cc +++ b/passes/memory/memory_map.cc @@ -352,7 +352,7 @@ struct MemoryMapWorker struct MemoryMapPass : public Pass { MemoryMapPass() : Pass("memory_map", "translate multiport memories to basic cells") { } - virtual void help() + void help() YS_OVERRIDE { // |---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---| log("\n"); @@ -362,7 +362,7 @@ struct MemoryMapPass : public Pass { log("pass to word-wide DFFs and address decoders.\n"); log("\n"); } - virtual void execute(std::vector<std::string> args, RTLIL::Design *design) { + void execute(std::vector<std::string> args, RTLIL::Design *design) YS_OVERRIDE { log_header(design, "Executing MEMORY_MAP pass (converting $mem cells to logic and flip-flops).\n"); extra_args(args, 1, design); for (auto mod : design->selected_modules()) |