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authorClifford Wolf <clifford@clifford.at>2014-07-28 11:08:55 +0200
committerClifford Wolf <clifford@clifford.at>2014-07-28 11:27:48 +0200
commit7bd2d1064f2eceddc3c93c121c4154a2f594a040 (patch)
tree563de1df5e323d0f217a51e29acb56c9e9f1327d /passes/opt/opt_clean.cc
parentd86a25f145012ccb6b2048af3aae22f13b97b505 (diff)
Using log_assert() instead of assert()
Diffstat (limited to 'passes/opt/opt_clean.cc')
-rw-r--r--passes/opt/opt_clean.cc3
1 files changed, 1 insertions, 2 deletions
diff --git a/passes/opt/opt_clean.cc b/passes/opt/opt_clean.cc
index 6c20bddb..4182c6f5 100644
--- a/passes/opt/opt_clean.cc
+++ b/passes/opt/opt_clean.cc
@@ -23,7 +23,6 @@
#include "kernel/log.h"
#include "kernel/celltypes.h"
#include <stdlib.h>
-#include <assert.h>
#include <stdio.h>
#include <set>
@@ -227,7 +226,7 @@ static void rmunused_module_signals(RTLIL::Module *module, bool purge_mode, bool
if (!used_signals.check_any(s2) && wire->port_id == 0 && !wire->get_bool_attribute("\\keep")) {
maybe_del_wires.push_back(wire);
} else {
- assert(SIZE(s1) == SIZE(s2));
+ log_assert(SIZE(s1) == SIZE(s2));
RTLIL::SigSig new_conn;
for (int i = 0; i < SIZE(s1); i++)
if (s1[i] != s2[i]) {