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authorClifford Wolf <clifford@clifford.at>2014-01-19 14:03:40 +0100
committerClifford Wolf <clifford@clifford.at>2014-01-19 14:03:40 +0100
commit1e67099b77904802880ad7c53d2cac33c6df456f (patch)
tree87deccc08f9e4bbbc7d2448852daf68d4ba0b35e /passes/opt
parent9a1eb45c7517f224a2516ce235fd53d01d9ef908 (diff)
Added $assert cell
Diffstat (limited to 'passes/opt')
-rw-r--r--passes/opt/opt_clean.cc2
1 files changed, 1 insertions, 1 deletions
diff --git a/passes/opt/opt_clean.cc b/passes/opt/opt_clean.cc
index 2921c92d..051d8dc6 100644
--- a/passes/opt/opt_clean.cc
+++ b/passes/opt/opt_clean.cc
@@ -47,7 +47,7 @@ static void rmunused_module_cells(RTLIL::Module *module, bool verbose)
wire2driver.insert(sig, cell);
}
}
- if (cell->type == "$memwr" || cell->get_bool_attribute("\\keep"))
+ if (cell->type == "$memwr" || cell->type == "$assert" || cell->get_bool_attribute("\\keep"))
queue.insert(cell);
unused.insert(cell);
}