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authorClifford Wolf <clifford@clifford.at>2014-02-02 21:09:08 +0100
committerClifford Wolf <clifford@clifford.at>2014-02-02 21:09:08 +0100
commit83fa65282017cb39a31c6c4c878b9960d8097b66 (patch)
tree246d4cc1af6cefb893ff3780c475531cc742ecc1 /passes/opt
parent6983d3f10bc526c51803107efa98e6d16353b414 (diff)
Added constant-clock case to opt_rmdff
Diffstat (limited to 'passes/opt')
-rw-r--r--passes/opt/opt_rmdff.cc8
1 files changed, 8 insertions, 0 deletions
diff --git a/passes/opt/opt_rmdff.cc b/passes/opt/opt_rmdff.cc
index 9ce98004..a8e2c412 100644
--- a/passes/opt/opt_rmdff.cc
+++ b/passes/opt/opt_rmdff.cc
@@ -92,6 +92,14 @@ static bool handle_dff(RTLIL::Module *mod, RTLIL::Cell *dff)
}
}
+ if (sig_c.is_fully_const()) {
+ if (val_rv.bits.size() == 0)
+ val_rv = RTLIL::Const(RTLIL::State::Sx, sig_q.width);
+ RTLIL::SigSig conn(sig_q, val_rv);
+ mod->connections.push_back(conn);
+ goto delete_dff;
+ }
+
if (sig_d.is_fully_undef() && sig_d.width == int(val_rv.bits.size())) {
RTLIL::SigSig conn(sig_q, val_rv);
mod->connections.push_back(conn);