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authorClifford Wolf <clifford@clifford.at>2014-08-15 02:00:53 +0200
committerClifford Wolf <clifford@clifford.at>2014-08-15 02:01:30 +0200
commitd320e750877a6cf8d5993da6d2cd121fe5b4d78e (patch)
tree39e2b889be3e4fdf3a6844a7ca3948593ff76b48 /passes/techmap
parentc7afbd9d8efcf3045d9e4244600ce8d8e0d40b6d (diff)
document "techmap -map %<design-name>"
Diffstat (limited to 'passes/techmap')
-rw-r--r--passes/techmap/techmap.cc3
1 files changed, 3 insertions, 0 deletions
diff --git a/passes/techmap/techmap.cc b/passes/techmap/techmap.cc
index 29ce9676..a7f91e86 100644
--- a/passes/techmap/techmap.cc
+++ b/passes/techmap/techmap.cc
@@ -706,6 +706,9 @@ struct TechmapPass : public Pass {
log(" transforms the internal RTL cells to the internal gate\n");
log(" library.\n");
log("\n");
+ log(" -map %%<design-name>\n");
+ log(" like -map above, but with an in-memory design instead of a file.\n");
+ log("\n");
log(" -share_map filename\n");
log(" like -map, but look for the file in the share directory (where the\n");
log(" yosys data files are). this is mainly used internally when techmap\n");