Added "abc -lut w1:w2"

1 files changed, 21 insertions, 5 deletions

diff --git a/passes/abc/abc.cc b/passes/abc/abc.cc
index 78d8fc43..16b66d47 100644
--- a/passes/abc/abc.cc
+++ b/passes/abc/abc.cc
@@ -587,7 +587,7 @@ struct abc_output_filter
 };
 
 void abc_module(RTLIL::Design *design, RTLIL::Module *current_module, std::string script_file, std::string exe_file,
-		std::string liberty_file, std::string constr_file, bool cleanup, int lut_mode, bool dff_mode, std::string clk_str,
+		std::string liberty_file, std::string constr_file, bool cleanup, int lut_mode, int lut_mode2, bool dff_mode, std::string clk_str,
 		bool keepff, std::string delay_target, bool fast_mode, const std::vector<RTLIL::Cell*> &cells, bool show_tempdir)
 {
 	module = current_module;
@@ -853,6 +853,8 @@ void abc_module(RTLIL::Design *design, RTLIL::Module *current_module, std::strin
 				log_error("Opening %s for writing failed: %s\n", buffer.c_str(), strerror(errno));
 			for (int i = 0; i < lut_mode; i++)
 				fprintf(f, "%d 1.00 1.00\n", i+1);
+			for (int i = lut_mode; i < lut_mode2; i++)
+				fprintf(f, "%d %d.00 1.00\n", i+1, 2 << (i - lut_mode));
 			fclose(f);
 		}
 
@@ -1142,6 +1144,12 @@ struct AbcPass : public Pass {
 		log("    -lut <width>\n");
 		log("        generate netlist using luts of (max) the specified width.\n");
 		log("\n");
+		log("    -lut <w1>:<w2>\n");
+		log("        generate netlist using luts of (max) the specified width <w2>. All\n");
+		log("        luts with width <= <w1> have constant cost. for luts larger than <w1>\n");
+		log("        the area cost doubles with each additional input bit. the delay cost\n");
+		log("        is still constant for all lut widths.\n");
+		log("\n");
 		log("    -dff\n");
 		log("        also pass $_DFF_?_ and $_DFFE_??_ cells through ABC. modules with many\n");
 		log("        clock domains are automatically partitioned in clock domains and each\n");
@@ -1186,7 +1194,7 @@ struct AbcPass : public Pass {
 		std::string script_file, liberty_file, constr_file, clk_str, delay_target;
 		bool fast_mode = false, dff_mode = false, keepff = false, cleanup = true;
 		bool show_tempdir = false;
-		int lut_mode = 0;
+		int lut_mode = 0, lut_mode2 = 0;
 		markgroups = false;
 
 #ifdef _WIN32
@@ -1229,7 +1237,15 @@ struct AbcPass : public Pass {
 				continue;
 			}
 			if (arg == "-lut" && argidx+1 < args.size()) {
-				lut_mode = atoi(args[++argidx].c_str());
+				string arg = args[++argidx];
+				size_t pos = arg.find_first_of(':');
+				if (pos != string::npos) {
+					lut_mode = atoi(arg.substr(0, pos).c_str());
+					lut_mode2 = atoi(arg.substr(pos+1).c_str());
+				} else {
+					lut_mode = atoi(arg.c_str());
+					lut_mode2 = lut_mode;
+				}
 				continue;
 			}
 			if (arg == "-fast") {
@@ -1274,7 +1290,7 @@ struct AbcPass : public Pass {
 			if (mod->processes.size() > 0)
 				log("Skipping module %s as it contains processes.\n", log_id(mod));
 			else if (!dff_mode || !clk_str.empty())
-				abc_module(design, mod, script_file, exe_file, liberty_file, constr_file, cleanup, lut_mode, dff_mode, clk_str, keepff, delay_target, fast_mode, mod->selected_cells(), show_tempdir);
+				abc_module(design, mod, script_file, exe_file, liberty_file, constr_file, cleanup, lut_mode, lut_mode2, dff_mode, clk_str, keepff, delay_target, fast_mode, mod->selected_cells(), show_tempdir);
 			else
 			{
 				assign_map.set(mod);
@@ -1418,7 +1434,7 @@ struct AbcPass : public Pass {
 					clk_sig = assign_map(std::get<1>(it.first));
 					en_polarity = std::get<2>(it.first);
 					en_sig = assign_map(std::get<3>(it.first));
-					abc_module(design, mod, script_file, exe_file, liberty_file, constr_file, cleanup, lut_mode,
+					abc_module(design, mod, script_file, exe_file, liberty_file, constr_file, cleanup, lut_mode, lut_mode2,
 							!clk_sig.empty(), "$", keepff, delay_target, fast_mode, it.second, show_tempdir);
 					assign_map.set(mod);
 				}