summaryrefslogtreecommitdiff
path: root/passes
diff options
context:
space:
mode:
authorClifford Wolf <clifford@clifford.at>2014-09-16 12:40:58 +0200
committerClifford Wolf <clifford@clifford.at>2014-09-16 12:40:58 +0200
commitae02d9cb9a990bfbe76d056fd341d88a9a5f129c (patch)
tree86633ec31593f80e871ab0c5d353b598a42f7a1a /passes
parentfa96cf4a1694afb1ac83e9fc9b894420fc210b97 (diff)
Fixed $memwr/$memrd order in memory_dff
Diffstat (limited to 'passes')
-rw-r--r--passes/memory/memory_dff.cc10
1 files changed, 6 insertions, 4 deletions
diff --git a/passes/memory/memory_dff.cc b/passes/memory/memory_dff.cc
index cdd0b85e..302ab3ab 100644
--- a/passes/memory/memory_dff.cc
+++ b/passes/memory/memory_dff.cc
@@ -169,12 +169,14 @@ static void handle_module(RTLIL::Module *module, bool flag_wr_only)
if (cell->type == "$dff")
dff_cells.push_back(cell);
- for (auto cell : module->selected_cells()) {
+ for (auto cell : module->selected_cells())
if (cell->type == "$memwr" && !cell->parameters["\\CLK_ENABLE"].as_bool())
- handle_wr_cell(module, dff_cells, cell);
- if (!flag_wr_only && cell->type == "$memrd" && !cell->parameters["\\CLK_ENABLE"].as_bool())
+ handle_wr_cell(module, dff_cells, cell);
+
+ if (!flag_wr_only)
+ for (auto cell : module->selected_cells())
+ if (cell->type == "$memrd" && !cell->parameters["\\CLK_ENABLE"].as_bool())
handle_rd_cell(module, dff_cells, cell);
- }
}
struct MemoryDffPass : public Pass {