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authorClifford Wolf <clifford@clifford.at>2013-09-14 13:29:11 +0200
committerClifford Wolf <clifford@clifford.at>2013-09-14 13:29:11 +0200
commit2c9bd23801fc00463cd218319c7f2f3a89852260 (patch)
treea2b0ff142d2c22fda1873b946298825db1c2b389 /techlibs/cmos/counter.v
parentbbe5aa446b413c6298a4b0b13f6fabcd6c984cb6 (diff)
Added spice testbench to techlibs/cmos
Diffstat (limited to 'techlibs/cmos/counter.v')
-rw-r--r--techlibs/cmos/counter.v6
1 files changed, 3 insertions, 3 deletions
diff --git a/techlibs/cmos/counter.v b/techlibs/cmos/counter.v
index 72208bd8..68b5c05b 100644
--- a/techlibs/cmos/counter.v
+++ b/techlibs/cmos/counter.v
@@ -1,12 +1,12 @@
module counter (clk, rst, en, count);
input clk, rst, en;
- output reg [3:0] count;
+ output reg [2:0] count;
always @(posedge clk)
if (rst)
- count <= 4'd0;
+ count <= 3'd0;
else if (en)
- count <= count + 4'd1;
+ count <= count + 3'd1;
endmodule