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authorClifford Wolf <clifford@clifford.at>2014-08-14 20:53:21 +0200
committerClifford Wolf <clifford@clifford.at>2014-08-14 20:53:21 +0200
commit5602cbde9f9f86197511036d8873c0f8fb1ca5d7 (patch)
treef09f87b5ac8a41f50aa6ccec70cfcf2a0831dd29 /techlibs/common/techmap.v
parent1bf7a18fec76cf46a5b8710a75371e23b68d147d (diff)
Simplified $__arraymul techmap rule
Diffstat (limited to 'techlibs/common/techmap.v')
-rw-r--r--techlibs/common/techmap.v20
1 files changed, 13 insertions, 7 deletions
diff --git a/techlibs/common/techmap.v b/techlibs/common/techmap.v
index e1d5bd82..7a4f6b27 100644
--- a/techlibs/common/techmap.v
+++ b/techlibs/common/techmap.v
@@ -502,15 +502,21 @@ module \$__arraymul (A, B, Y);
input [WIDTH-1:0] A, B;
output [WIDTH-1:0] Y;
- wire [WIDTH*WIDTH-1:0] partials;
+ wire [1023:0] _TECHMAP_DO_ = "proc;;";
- genvar i;
- assign partials[WIDTH-1 : 0] = A[0] ? B : 0;
- generate for (i = 1; i < WIDTH; i = i+1) begin:gen
- assign partials[WIDTH*(i+1)-1 : WIDTH*i] = (A[i] ? B << i : 0) + partials[WIDTH*i-1 : WIDTH*(i-1)];
- end endgenerate
+ integer i;
+ reg [WIDTH-1:0] x, y;
+
+ always @* begin
+ x = B;
+ y = A[0] ? x : 0;
+ for (i = 1; i < WIDTH; i = i+1) begin
+ x = {x[WIDTH-2:0], 1'b0};
+ y = y + (A[i] ? x : 0);
+ end
+ end
- assign Y = partials[WIDTH*WIDTH-1 : WIDTH*(WIDTH-1)];
+ assign Y = y;
endmodule
module \$mul (A, B, Y);