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authorRuben Undheim <ruben.undheim@gmail.com>2016-11-03 23:18:00 +0100
committerRuben Undheim <ruben.undheim@gmail.com>2016-11-03 23:18:00 +0100
commitfefe0fc0430f4f173a25e674708aa0f4f0854b31 (patch)
treeadb13b830212c269d58031f900d652f29013d2d7 /techlibs/common
parent4f096fe65b77435daba019248273e547fa18d167 (diff)
Imported yosys 0.7
Diffstat (limited to 'techlibs/common')
-rw-r--r--techlibs/common/prep.cc16
-rw-r--r--techlibs/common/simcells.v17
-rw-r--r--techlibs/common/simlib.v29
-rw-r--r--techlibs/common/techmap.v2
4 files changed, 59 insertions, 5 deletions
diff --git a/techlibs/common/prep.cc b/techlibs/common/prep.cc
index fac6c4ba..71534983 100644
--- a/techlibs/common/prep.cc
+++ b/techlibs/common/prep.cc
@@ -63,6 +63,9 @@ struct PrepPass : public ScriptPass
log(" -nordff\n");
log(" passed to 'memory_dff'. prohibits merging of FFs into memory read ports\n");
log("\n");
+ log(" -nokeepdc\n");
+ log(" do not call opt_* with -keepdc\n");
+ log("\n");
log(" -run <from_label>[:<to_label>]\n");
log(" only run the commands between the labels (see below). an empty\n");
log(" from label is synonymous to 'begin', and empty to label is\n");
@@ -75,7 +78,7 @@ struct PrepPass : public ScriptPass
}
string top_module, fsm_opts, memory_opts;
- bool autotop, flatten, ifxmode, memxmode, nomemmode;
+ bool autotop, flatten, ifxmode, memxmode, nomemmode, nokeepdc;
virtual void clear_flags() YS_OVERRIDE
{
@@ -87,6 +90,7 @@ struct PrepPass : public ScriptPass
ifxmode = false;
memxmode = false;
nomemmode = false;
+ nokeepdc = false;
}
virtual void execute(std::vector<std::string> args, RTLIL::Design *design) YS_OVERRIDE
@@ -136,6 +140,10 @@ struct PrepPass : public ScriptPass
memory_opts += " -nordff";
continue;
}
+ if (args[argidx] == "-nokeepdc") {
+ nokeepdc = true;
+ continue;
+ }
break;
}
extra_args(args, argidx, design);
@@ -177,10 +185,10 @@ struct PrepPass : public ScriptPass
run(ifxmode ? "proc -ifx" : "proc");
if (help_mode || flatten)
run("flatten", "(if -flatten)");
- run("opt_expr -keepdc");
+ run(nokeepdc ? "opt_expr" : "opt_expr -keepdc");
run("opt_clean");
run("check");
- run("opt -keepdc");
+ run(nokeepdc ? "opt" : "opt -keepdc");
if (!ifxmode) {
if (help_mode)
run("wreduce [-memx]");
@@ -194,7 +202,7 @@ struct PrepPass : public ScriptPass
run("opt_clean");
run("memory_collect");
}
- run("opt -keepdc -fast");
+ run(nokeepdc ? "opt -fast" : "opt -keepdc -fast");
}
if (check_label("check"))
diff --git a/techlibs/common/simcells.v b/techlibs/common/simcells.v
index c4f170a3..e770c545 100644
--- a/techlibs/common/simcells.v
+++ b/techlibs/common/simcells.v
@@ -495,6 +495,23 @@ always @(posedge S, posedge R) begin
end
endmodule
+`ifdef SIMCELLS_FF
+// |---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|
+//-
+//- $_FF_ (D, Q)
+//-
+//- A D-type flip-flop that is clocked from the implicit global clock. (This cell
+//- type is usually only used in netlists for formal verification.)
+//-
+module \$_FF_ (D, Q);
+input D;
+output reg Q;
+always @($global_clock) begin
+ Q <= D;
+end
+endmodule
+`endif
+
// |---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|
//-
//- $_DFF_N_ (D, C, Q)
diff --git a/techlibs/common/simlib.v b/techlibs/common/simlib.v
index 922a47ca..2c4db1ac 100644
--- a/techlibs/common/simlib.v
+++ b/techlibs/common/simlib.v
@@ -1334,6 +1334,18 @@ endmodule
// --------------------------------------------------------
+module \$anyseq (Y);
+
+parameter WIDTH = 0;
+
+output [WIDTH-1:0] Y;
+
+assign Y = 'bx;
+
+endmodule
+
+// --------------------------------------------------------
+
module \$equiv (A, B, Y);
input A, B;
@@ -1382,6 +1394,23 @@ endmodule
`endif
// --------------------------------------------------------
+`ifdef SIMLIB_FF
+
+module \$ff (D, Q);
+
+parameter WIDTH = 0;
+
+input [WIDTH-1:0] D;
+output reg [WIDTH-1:0] Q;
+
+always @($global_clk) begin
+ Q <= D;
+end
+
+endmodule
+
+`endif
+// --------------------------------------------------------
module \$dff (CLK, D, Q);
diff --git a/techlibs/common/techmap.v b/techlibs/common/techmap.v
index 90c4ed7e..d7ec3947 100644
--- a/techlibs/common/techmap.v
+++ b/techlibs/common/techmap.v
@@ -64,7 +64,7 @@ module _90_simplemap_various;
endmodule
(* techmap_simplemap *)
-(* techmap_celltype = "$sr $dff $dffe $adff $dffsr $dlatch" *)
+(* techmap_celltype = "$sr $ff $dff $dffe $adff $dffsr $dlatch" *)
module _90_simplemap_registers;
endmodule