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authorClifford Wolf <clifford@clifford.at>2015-02-01 23:06:44 +0100
committerClifford Wolf <clifford@clifford.at>2015-02-01 23:06:44 +0100
commitbebbf2e5a4ca6a1378f621243dfc06b185a6884e (patch)
tree6666337237318fb27ca6fc49fbdc2bc050b6dc11 /techlibs/xilinx
parent893fe87a33dc6646cabc7538d4dbe411041afb94 (diff)
no support for 6-series xilinx devices
Diffstat (limited to 'techlibs/xilinx')
-rw-r--r--techlibs/xilinx/synth_xilinx.cc2
1 files changed, 1 insertions, 1 deletions
diff --git a/techlibs/xilinx/synth_xilinx.cc b/techlibs/xilinx/synth_xilinx.cc
index caa7e205..7812fa29 100644
--- a/techlibs/xilinx/synth_xilinx.cc
+++ b/techlibs/xilinx/synth_xilinx.cc
@@ -44,7 +44,7 @@ struct SynthXilinxPass : public Pass {
log("\n");
log("This command runs synthesis for Xilinx FPGAs. This command does not operate on\n");
log("partly selected designs. At the moment this command creates netlists that are\n");
- log("compatible with 7-series and 6-series Xilinx devices.\n");
+ log("compatible with 7-Series Xilinx devices.\n");
log("\n");
log(" -top <module>\n");
log(" use the specified module as top module (default='top')\n");