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authorClifford Wolf <clifford@clifford.at>2014-08-14 11:39:46 +0200
committerClifford Wolf <clifford@clifford.at>2014-08-14 11:39:46 +0200
commit13f2f36884fa3e4a8329dab2556af7000cb085df (patch)
tree59787125c75220ee6f78d160e6cc6cfcc583d0ec /techlibs
parent28cf48e31f049f8343023de46cd916ac47fcfc5d (diff)
RIP $safe_pmux
Diffstat (limited to 'techlibs')
-rw-r--r--techlibs/common/simlib.v31
-rw-r--r--techlibs/common/techmap.v37
2 files changed, 4 insertions, 64 deletions
diff --git a/techlibs/common/simlib.v b/techlibs/common/simlib.v
index c2f6cb27..4b3317a7 100644
--- a/techlibs/common/simlib.v
+++ b/techlibs/common/simlib.v
@@ -938,39 +938,16 @@ input [S_WIDTH-1:0] S;
output reg [WIDTH-1:0] Y;
integer i;
+reg found_active_sel_bit;
always @* begin
Y = A;
- for (i = 0; i < S_WIDTH; i = i+1)
- if (S[i])
- Y = B >> (WIDTH*i);
-end
-
-endmodule
-
-// --------------------------------------------------------
-
-module \$safe_pmux (A, B, S, Y);
-
-parameter WIDTH = 0;
-parameter S_WIDTH = 0;
-
-input [WIDTH-1:0] A;
-input [WIDTH*S_WIDTH-1:0] B;
-input [S_WIDTH-1:0] S;
-output reg [WIDTH-1:0] Y;
-
-integer i, j;
-
-always @* begin
- j = 0;
+ found_active_sel_bit = 0;
for (i = 0; i < S_WIDTH; i = i+1)
if (S[i]) begin
- Y = B >> (WIDTH*i);
- j = j + 1;
+ Y = found_active_sel_bit ? 'bx : B >> (WIDTH*i);
+ found_active_sel_bit = 1;
end
- if (j != 1)
- Y = A;
end
endmodule
diff --git a/techlibs/common/techmap.v b/techlibs/common/techmap.v
index 3670bd69..e1d5bd82 100644
--- a/techlibs/common/techmap.v
+++ b/techlibs/common/techmap.v
@@ -794,40 +794,3 @@ module \$pmux (A, B, S, Y);
assign Y = |S ? Y_B : A;
endmodule
-module \$safe_pmux (A, B, S, Y);
- parameter WIDTH = 1;
- parameter S_WIDTH = 1;
-
- input [WIDTH-1:0] A;
- input [WIDTH*S_WIDTH-1:0] B;
- input [S_WIDTH-1:0] S;
- output [WIDTH-1:0] Y;
-
- wire [S_WIDTH-1:0] status_found_first;
- wire [S_WIDTH-1:0] status_found_second;
-
- genvar i;
- generate
- for (i = 0; i < S_WIDTH; i = i + 1) begin:GEN1
- wire pre_first;
- if (i > 0) begin:GEN2
- assign pre_first = status_found_first[i-1];
- end:GEN2 else begin:GEN3
- assign pre_first = 0;
- end:GEN3
- assign status_found_first[i] = pre_first | S[i];
- assign status_found_second[i] = pre_first & S[i];
- end:GEN1
- endgenerate
-
- \$pmux #(
- .WIDTH(WIDTH),
- .S_WIDTH(S_WIDTH)
- ) pmux_cell (
- .A(A),
- .B(B),
- .S(S & {S_WIDTH{~|status_found_second}}),
- .Y(Y)
- );
-endmodule
-