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authorClifford Wolf <clifford@clifford.at>2014-08-08 14:30:45 +0200
committerClifford Wolf <clifford@clifford.at>2014-08-08 15:08:11 +0200
commit51aa5544fbda97c6b49bfba55696083ba47d4cef (patch)
tree8aa603acbca96bb6514cd2c240865d332e3f1947 /tests/fsm/generate.py
parent58ac605470aed3b2a537b4f99ac17a199f8b5233 (diff)
Improved FSM tests
Diffstat (limited to 'tests/fsm/generate.py')
-rw-r--r--tests/fsm/generate.py4
1 files changed, 2 insertions, 2 deletions
diff --git a/tests/fsm/generate.py b/tests/fsm/generate.py
index 0d000f04..722bd62a 100644
--- a/tests/fsm/generate.py
+++ b/tests/fsm/generate.py
@@ -30,7 +30,7 @@ def random_expr(variables):
return "%d'd%s" % (bits, random.randint(0, 2**bits-1))
raise AssertionError
-for idx in range(100):
+for idx in range(50):
with file('temp/uut_%05d.v' % idx, 'w') as f, redirect_stdout(f):
print('module uut_%05d(clk, rst, a, b, c, x, y, z);' % (idx))
print(' input clk, rst;')
@@ -79,5 +79,5 @@ for idx in range(100):
print('opt; wreduce; share; opt; fsm;;')
print('cd ..')
print('miter -equiv -flatten -ignore_gold_x -make_outputs -make_outcmp gold gate miter')
- print('sat -verify -seq 5 -set-at 1 in_rst 1 -prove trigger 0 -prove-skip 1 -show-inputs -show-outputs miter')
+ print('sat -verify-no-timeout -timeout 20 -seq 5 -set-at 1 in_rst 1 -prove trigger 0 -prove-skip 1 -show-inputs -show-outputs miter')