diff options
| -rw-r--r-- | frontends/blif/blifparse.cc | 2 | ||||
| -rw-r--r-- | passes/opt/wreduce.cc | 4 |
2 files changed, 3 insertions, 3 deletions
diff --git a/frontends/blif/blifparse.cc b/frontends/blif/blifparse.cc index 4bf05074..9f2e08df 100644 --- a/frontends/blif/blifparse.cc +++ b/frontends/blif/blifparse.cc @@ -133,7 +133,7 @@ void parse_blif(RTLIL::Design *design, std::istream &f, std::string dff_name) if (v[0] == '"') { std::string str(v+1); if (str.back() == '"') - str.pop_back(); + str.resize(str.size()-1); const_v = Const(str); } else { int n = strlen(v); diff --git a/passes/opt/wreduce.cc b/passes/opt/wreduce.cc index 70a40e96..dfcfebf4 100644 --- a/passes/opt/wreduce.cc +++ b/passes/opt/wreduce.cc @@ -348,9 +348,9 @@ struct WreducePass : public Pass { continue; for (auto c : module->selected_cells()) - if (c->type.in({"$reduce_and", "$reduce_or", "$reduce_xor", "$reduce_xnor", "$reduce_bool", + if (c->type.in("$reduce_and", "$reduce_or", "$reduce_xor", "$reduce_xnor", "$reduce_bool", "$lt", "$le", "$eq", "$ne", "$eqx", "$nex", "$ge", "$gt", - "$logic_not", "$logic_and", "$logic_or"}) && GetSize(c->getPort("\\Y")) > 1) { + "$logic_not", "$logic_and", "$logic_or") && GetSize(c->getPort("\\Y")) > 1) { SigSpec sig = c->getPort("\\Y"); c->setPort("\\Y", sig[0]); c->setParam("\\Y_WIDTH", 1); |