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-rw-r--r--frontends/ast/genrtlil.cc1
-rw-r--r--passes/cmds/show.cc5
2 files changed, 5 insertions, 1 deletions
diff --git a/frontends/ast/genrtlil.cc b/frontends/ast/genrtlil.cc
index f7e7b852..8aea0596 100644
--- a/frontends/ast/genrtlil.cc
+++ b/frontends/ast/genrtlil.cc
@@ -265,6 +265,7 @@ struct AST_INTERNAL::ProcessGenerator
{
// generate process and simple root case
proc = new RTLIL::Process;
+ proc->attributes["\\src"] = stringf("%s:%d", always->filename.c_str(), always->linenum);
proc->name = stringf("$proc$%s:%d$%d", always->filename.c_str(), always->linenum, RTLIL::autoidx++);
for (auto &attr : always->attributes) {
if (attr.second->type != AST_CONSTANT)
diff --git a/passes/cmds/show.cc b/passes/cmds/show.cc
index f5ebe774..c4d93333 100644
--- a/passes/cmds/show.cc
+++ b/passes/cmds/show.cc
@@ -386,7 +386,10 @@ struct ShowWorker
net_conn_map[node].in.insert(stringf("p%d", pidx));
}
- fprintf(f, "p%d [shape=box, style=rounded, label=\"PROC\\n%s\"];\n", pidx, RTLIL::id2cstr(proc->name));
+ std::string proc_src = RTLIL::unescape_id(proc->name);
+ if (proc->attributes.count("\\src") > 0)
+ proc_src = proc->attributes.at("\\src").str;
+ fprintf(f, "p%d [shape=box, style=rounded, label=\"PROC\\n%s\"];\n", pidx, proc_src.c_str());
}
for (auto &conn : module->connections)