diff options
| -rw-r--r-- | frontends/ast/genrtlil.cc | 3 | ||||
| -rw-r--r-- | tests/simple/vloghammer.v | 8 |
2 files changed, 11 insertions, 0 deletions
diff --git a/frontends/ast/genrtlil.cc b/frontends/ast/genrtlil.cc index a9574254..e7ceec5f 100644 --- a/frontends/ast/genrtlil.cc +++ b/frontends/ast/genrtlil.cc @@ -998,6 +998,9 @@ RTLIL::SigSpec AstNode::genRTLIL(int width_hint, bool sign_hint) // generate multiplexer for ternary operator (aka ?:-operator) case AST_TERNARY: { + if (width_hint < 0) + detectSignWidth(width_hint, sign_hint); + RTLIL::SigSpec cond = children[0]->genRTLIL(); RTLIL::SigSpec val1 = children[1]->genRTLIL(width_hint, sign_hint); RTLIL::SigSpec val2 = children[2]->genRTLIL(width_hint, sign_hint); diff --git a/tests/simple/vloghammer.v b/tests/simple/vloghammer.v index c97a2be5..fffa3505 100644 --- a/tests/simple/vloghammer.v +++ b/tests/simple/vloghammer.v @@ -65,3 +65,11 @@ module test09(a, b, c, y); assign y = a ? b : c; endmodule +module test10(a, b, c, y); + input a; + input signed [1:0] b; + input signed [2:0] c; + output y; + assign y = ^(a ? b : c); +endmodule + |