diff options
| -rw-r--r-- | frontends/verilog/const2ast.cc | 10 | ||||
| -rw-r--r-- | frontends/verilog/verilog_frontend.h | 2 | ||||
| -rw-r--r-- | frontends/verilog/verilog_parser.y | 8 |
3 files changed, 14 insertions, 6 deletions
diff --git a/frontends/verilog/const2ast.cc b/frontends/verilog/const2ast.cc index a81e3010..ca995915 100644 --- a/frontends/verilog/const2ast.cc +++ b/frontends/verilog/const2ast.cc @@ -132,8 +132,16 @@ static void my_strtobin(std::vector<RTLIL::State> &data, const char *str, int le } // convert the verilog code for a constant to an AST node -AstNode *VERILOG_FRONTEND::const2ast(std::string code, char case_type) +AstNode *VERILOG_FRONTEND::const2ast(std::string code, char case_type, bool warn_z) { + if (warn_z) { + AstNode *ret = const2ast(code, case_type); + if (std::find(ret->bits.begin(), ret->bits.end(), RTLIL::State::Sz) != ret->bits.end()) + log_warning("Yosys does not support tri-state logic at the moment. (%s:%d)\n", + current_filename.c_str(), frontend_verilog_yyget_lineno()); + return ret; + } + const char *str = code.c_str(); // Strings diff --git a/frontends/verilog/verilog_frontend.h b/frontends/verilog/verilog_frontend.h index af6495f8..e277f3e3 100644 --- a/frontends/verilog/verilog_frontend.h +++ b/frontends/verilog/verilog_frontend.h @@ -43,7 +43,7 @@ namespace VERILOG_FRONTEND extern struct AST::AstNode *current_ast; // this function converts a Verilog constant to an AST_CONSTANT node - AST::AstNode *const2ast(std::string code, char case_type = 0); + AST::AstNode *const2ast(std::string code, char case_type = 0, bool warn_z = false); // state of `default_nettype extern bool default_nettype_wire; diff --git a/frontends/verilog/verilog_parser.y b/frontends/verilog/verilog_parser.y index e40bc188..75af4652 100644 --- a/frontends/verilog/verilog_parser.y +++ b/frontends/verilog/verilog_parser.y @@ -1251,7 +1251,7 @@ basic_expr: if ($4->substr(0, 1) != "'") frontend_verilog_yyerror("Syntax error."); AstNode *bits = $2; - AstNode *val = const2ast(*$4, case_type_stack.size() == 0 ? 0 : case_type_stack.back()); + AstNode *val = const2ast(*$4, case_type_stack.size() == 0 ? 0 : case_type_stack.back(), true); if (val == NULL) log_error("Value conversion failed: `%s'\n", $4->c_str()); $$ = new AstNode(AST_TO_BITS, bits, val); @@ -1262,7 +1262,7 @@ basic_expr: frontend_verilog_yyerror("Syntax error."); AstNode *bits = new AstNode(AST_IDENTIFIER); bits->str = *$1; - AstNode *val = const2ast(*$2, case_type_stack.size() == 0 ? 0 : case_type_stack.back()); + AstNode *val = const2ast(*$2, case_type_stack.size() == 0 ? 0 : case_type_stack.back(), true); if (val == NULL) log_error("Value conversion failed: `%s'\n", $2->c_str()); $$ = new AstNode(AST_TO_BITS, bits, val); @@ -1270,14 +1270,14 @@ basic_expr: delete $2; } | TOK_CONST TOK_CONST { - $$ = const2ast(*$1 + *$2, case_type_stack.size() == 0 ? 0 : case_type_stack.back()); + $$ = const2ast(*$1 + *$2, case_type_stack.size() == 0 ? 0 : case_type_stack.back(), true); if ($$ == NULL || (*$2)[0] != '\'') log_error("Value conversion failed: `%s%s'\n", $1->c_str(), $2->c_str()); delete $1; delete $2; } | TOK_CONST { - $$ = const2ast(*$1, case_type_stack.size() == 0 ? 0 : case_type_stack.back()); + $$ = const2ast(*$1, case_type_stack.size() == 0 ? 0 : case_type_stack.back(), true); if ($$ == NULL) log_error("Value conversion failed: `%s'\n", $1->c_str()); delete $1; |