diff options
| -rw-r--r-- | kernel/satgen.h | 2 | ||||
| -rw-r--r-- | passes/sat/sat_solve.cc | 4 |
2 files changed, 4 insertions, 2 deletions
diff --git a/kernel/satgen.h b/kernel/satgen.h index ec0805bb..7b7a0770 100644 --- a/kernel/satgen.h +++ b/kernel/satgen.h @@ -107,7 +107,7 @@ struct SatGen ez->assume(ez->vec_eq(ez->vec_and(a, b), y)); if (cell->type == "$or" || cell->type == "$_OR_") ez->assume(ez->vec_eq(ez->vec_or(a, b), y)); - if (cell->type == "$xor" || cell->type == "$_XOR") + if (cell->type == "$xor" || cell->type == "$_XOR_") ez->assume(ez->vec_eq(ez->vec_xor(a, b), y)); if (cell->type == "$xnor") ez->assume(ez->vec_eq(ez->vec_not(ez->vec_xor(a, b)), y)); diff --git a/passes/sat/sat_solve.cc b/passes/sat/sat_solve.cc index 8e82e4ec..362efb2d 100644 --- a/passes/sat/sat_solve.cc +++ b/passes/sat/sat_solve.cc @@ -423,7 +423,9 @@ rerun_solver: value.bits.push_back(modelValues.at(info.offset+i) ? RTLIL::State::S1 : RTLIL::State::S0); if (info.timestep != last_timestep) { - const char *hline = "--------------------------------------------------------"; + const char *hline = "---------------------------------------------------------------------------------------------------" + "---------------------------------------------------------------------------------------------------" + "---------------------------------------------------------------------------------------------------"; if (last_timestep == -2) { log(seq_len > 0 ? " Time " : " "); log("%-*s %10s %10s %*s\n", maxModelName+10, "Signal Name", "Dec", "Hex", maxModelWidth+5, "Bin"); |