diff options
| -rw-r--r-- | passes/opt/wreduce.cc | 25 | ||||
| -rw-r--r-- | tests/simple/wreduce.v | 9 |
2 files changed, 34 insertions, 0 deletions
diff --git a/passes/opt/wreduce.cc b/passes/opt/wreduce.cc index df416e4c..4f08da67 100644 --- a/passes/opt/wreduce.cc +++ b/passes/opt/wreduce.cc @@ -201,6 +201,31 @@ struct WreduceWorker if (max_port_b_size >= 0) run_reduce_inport(cell, 'B', max_port_b_size, port_b_signed, did_something); + if (cell->hasPort("\\A") && cell->hasPort("\\B") && port_a_signed && port_b_signed) { + SigSpec sig_a = mi.sigmap(cell->getPort("\\A")), sig_b = mi.sigmap(cell->getPort("\\B")); + if (GetSize(sig_a) > 0 && sig_a[GetSize(sig_a)-1] == State::S0 && + GetSize(sig_b) > 0 && sig_b[GetSize(sig_b)-1] == State::S0) { + log("Converting cell %s.%s (%s) from signed to unsigned.\n", + log_id(module), log_id(cell), log_id(cell->type)); + cell->setParam("\\A_SIGNED", 0); + cell->setParam("\\B_SIGNED", 0); + port_a_signed = false; + port_b_signed = false; + did_something = true; + } + } + + if (cell->hasPort("\\A") && !cell->hasPort("\\B") && port_a_signed) { + SigSpec sig_a = mi.sigmap(cell->getPort("\\A")); + if (GetSize(sig_a) > 0 && sig_a[GetSize(sig_a)-1] == State::S0) { + log("Converting cell %s.%s (%s) from signed to unsigned.\n", + log_id(module), log_id(cell), log_id(cell->type)); + cell->setParam("\\A_SIGNED", 0); + port_a_signed = false; + did_something = true; + } + } + // Reduce size of port Y based on sizes for A and B and unused bits in Y diff --git a/tests/simple/wreduce.v b/tests/simple/wreduce.v new file mode 100644 index 00000000..ba548438 --- /dev/null +++ b/tests/simple/wreduce.v @@ -0,0 +1,9 @@ +module wreduce_test0(input [7:0] a, b, output [15:0] x, y, z); + assign x = -$signed({1'b0, a}); + assign y = $signed({1'b0, a}) + $signed({1'b0, b}); + assign z = x ^ y; +endmodule + +module wreduce_test1(input [31:0] a, b, output [7:0] x, y, z, w); + assign x = a - b, y = a * b, z = a >> b, w = a << b; +endmodule |