diff options
| -rw-r--r-- | passes/techmap/dfflibmap.cc | 171 |
1 files changed, 168 insertions, 3 deletions
diff --git a/passes/techmap/dfflibmap.cc b/passes/techmap/dfflibmap.cc index 5e3219d5..111f2f91 100644 --- a/passes/techmap/dfflibmap.cc +++ b/passes/techmap/dfflibmap.cc @@ -35,12 +35,14 @@ static void logmap(std::string dff) if (cell_mappings.count(dff) == 0) { log(" unmapped dff cell: %s\n", dff.c_str()); } else { - log(" %s %s(", cell_mappings[dff].cell_name.c_str(), dff.substr(1).c_str()); + log(" %s %s (", cell_mappings[dff].cell_name.c_str(), dff.substr(1).c_str()); bool first = true; for (auto &port : cell_mappings[dff].ports) { char arg[3] = { port.second, 0, 0 }; if ('a' <= arg[0] && arg[0] <= 'z') arg[1] = arg[0] - ('a' - 'A'), arg[0] = '~'; + else + arg[1] = arg[0], arg[0] = ' '; log("%s.%s(%s)", first ? "" : ", ", port.first.c_str(), arg); first = false; } @@ -52,6 +54,7 @@ static void logmap_all() { logmap("$_DFF_N_"); logmap("$_DFF_P_"); + logmap("$_DFF_NN0_"); logmap("$_DFF_NN1_"); logmap("$_DFF_NP0_"); @@ -60,6 +63,15 @@ static void logmap_all() logmap("$_DFF_PN1_"); logmap("$_DFF_PP0_"); logmap("$_DFF_PP1_"); + + logmap("$_DFFSR_NNN_"); + logmap("$_DFFSR_NNP_"); + logmap("$_DFFSR_NPN_"); + logmap("$_DFFSR_NPP_"); + logmap("$_DFFSR_PNN_"); + logmap("$_DFFSR_PNP_"); + logmap("$_DFFSR_PPN_"); + logmap("$_DFFSR_PPP_"); } static bool parse_pin(LibertyAst *cell, LibertyAst *attr, std::string &pin_name, bool &pin_pol) @@ -175,6 +187,88 @@ static void find_cell(LibertyAst *ast, std::string cell_type, bool clkpol, bool } } +static void find_cell_sr(LibertyAst *ast, std::string cell_type, bool clkpol, bool setpol, bool clrpol) +{ + LibertyAst *best_cell = NULL; + std::map<std::string, char> best_cell_ports; + int best_cell_pins = 0; + + if (ast->id != "library") + log_error("Format error in liberty file.\n"); + + for (auto cell : ast->children) + { + if (cell->id != "cell" || cell->args.size() != 1) + continue; + + LibertyAst *ff = cell->find("ff"); + if (ff == NULL) + continue; + + std::string cell_clk_pin, cell_set_pin, cell_clr_pin, cell_next_pin; + bool cell_clk_pol, cell_set_pol, cell_clr_pol, cell_next_pol; + + if (!parse_pin(cell, ff->find("clocked_on"), cell_clk_pin, cell_clk_pol) || cell_clk_pol != clkpol) + continue; + if (!parse_pin(cell, ff->find("next_state"), cell_next_pin, cell_next_pol)) + continue; + if (!parse_pin(cell, ff->find("preset"), cell_set_pin, cell_set_pol) || cell_set_pol != setpol) + continue; + if (!parse_pin(cell, ff->find("clear"), cell_clr_pin, cell_clr_pol) || cell_clr_pol != clrpol) + continue; + + std::map<std::string, char> this_cell_ports; + this_cell_ports[cell_clk_pin] = 'C'; + this_cell_ports[cell_set_pin] = 'S'; + this_cell_ports[cell_clr_pin] = 'R'; + this_cell_ports[cell_next_pin] = 'D'; + + int num_pins = 0; + bool found_output = false; + for (auto pin : cell->children) + { + if (pin->id != "pin" || pin->args.size() != 1) + continue; + + LibertyAst *dir = pin->find("direction"); + if (dir == NULL || dir->value == "internal") + continue; + num_pins++; + + if (dir->value == "input" && this_cell_ports.count(pin->args[0]) == 0) + goto continue_cell_loop; + + LibertyAst *func = pin->find("function"); + if (dir->value == "output" && func != NULL) { + std::string value = func->value; + for (size_t pos = value.find_first_of("\" \t"); pos != std::string::npos; pos = value.find_first_of("\" \t")) + value.erase(pos, 1); + if ((cell_next_pol == true && value == ff->args[0]) || (cell_next_pol == false && value == ff->args[1])) { + this_cell_ports[pin->args[0]] = 'Q'; + found_output = true; + } + } + + if (this_cell_ports.count(pin->args[0]) == 0) + this_cell_ports[pin->args[0]] = 0; + } + + if (!found_output || (best_cell != NULL && num_pins > best_cell_pins)) + continue; + + best_cell = cell; + best_cell_pins = num_pins; + best_cell_ports.swap(this_cell_ports); + continue_cell_loop:; + } + + if (best_cell != NULL) { + log(" cell %s is a direct match for cell type %s.\n", best_cell->args[0].c_str(), cell_type.substr(1).c_str()); + cell_mappings[cell_type].cell_name = best_cell->args[0]; + cell_mappings[cell_type].ports = best_cell_ports; + } +} + static bool expand_cellmap_worker(std::string from, std::string to, std::string inv) { if (cell_mappings.count(to) > 0) @@ -185,7 +279,10 @@ static bool expand_cellmap_worker(std::string from, std::string to, std::string cell_mappings[to].ports = cell_mappings[from].ports; for (auto &it : cell_mappings[to].ports) { - if (inv.find(it.second) == std::string::npos) + char cmp_ch = it.second; + if ('a' <= cmp_ch && cmp_ch <= 'z') + cmp_ch -= 'a' - 'A'; + if (inv.find(cmp_ch) == std::string::npos) continue; if ('a' <= it.second && it.second <= 'z') it.second -= 'a' - 'A'; @@ -223,6 +320,48 @@ static bool expand_cellmap(std::string pattern, std::string inv) return return_status; } +static void map_sr_to_arst(const char *from, const char *to) +{ + if (cell_mappings.count(to) > 0) + return; + + char from_clk_pol = from[8], from_set_pol = from[9], from_clr_pol = from[10]; + char to_clk_pol = to[6], to_rst_pol = to[7], to_rst_val = to[8]; + + log_assert(from_clk_pol == to_clk_pol); + log_assert(to_rst_pol == from_set_pol && to_rst_pol == from_clr_pol); + + log(" create mapping for %s from mapping for %s.\n", to, from); + cell_mappings[to].cell_name = cell_mappings[from].cell_name; + cell_mappings[to].ports = cell_mappings[from].ports; + + for (auto &it : cell_mappings[to].ports) + { + bool is_set_pin = it.second == 'S' || it.second == 's'; + bool is_clr_pin = it.second == 'R' || it.second == 'r'; + + if (!is_set_pin && !is_clr_pin) + continue; + + if ((to_rst_val == '0' && is_set_pin) || (to_rst_val == '1' && is_clr_pin)) + { + // this is the unused set/clr pin -- deactivate it + if (is_set_pin) + it.second = (from_set_pol == 'P') == (it.second == 'S') ? '0' : '1'; + else + it.second = (from_clr_pol == 'P') == (it.second == 'R') ? '0' : '1'; + } + else + { + // this is the used set/clr pin -- rename it to 'reset' + if (it.second == 'S') + it.second = 'R'; + if (it.second == 's') + it.second = 'r'; + } + } +} + static void dfflibmap(RTLIL::Design *design, RTLIL::Module *module) { log("Mapping DFF cells in module `%s':\n", module->name.c_str()); @@ -256,7 +395,11 @@ static void dfflibmap(RTLIL::Design *design, RTLIL::Module *module) inv_cell->connections[port.second == 'q' ? "\\A" : "\\Y"] = sig; module->cells[inv_cell->name] = inv_cell; module->wires[inv_wire->name] = inv_wire; - } + } else + if (port.second == '0' || port.second == '1') { + sig = RTLIL::SigSpec(port.second == '0' ? 0 : 1, 1); + } else + log_abort(); new_cell->connections["\\" + port.first] = sig; } stats[stringf(" mapped %%d %s cells to %s cells.\n", cell->type.c_str(), new_cell->type.c_str())]++; @@ -311,6 +454,7 @@ struct DfflibmapPass : public Pass { find_cell(libparser.ast, "$_DFF_N_", false, false, false, false); find_cell(libparser.ast, "$_DFF_P_", true, false, false, false); + find_cell(libparser.ast, "$_DFF_NN0_", false, true, false, false); find_cell(libparser.ast, "$_DFF_NN1_", false, true, false, true); find_cell(libparser.ast, "$_DFF_NP0_", false, true, true, false); @@ -320,6 +464,15 @@ struct DfflibmapPass : public Pass { find_cell(libparser.ast, "$_DFF_PP0_", true, true, true, false); find_cell(libparser.ast, "$_DFF_PP1_", true, true, true, true); + find_cell_sr(libparser.ast, "$_DFFSR_NNN_", false, false, false); + find_cell_sr(libparser.ast, "$_DFFSR_NNP_", false, false, true); + find_cell_sr(libparser.ast, "$_DFFSR_NPN_", false, true, false); + find_cell_sr(libparser.ast, "$_DFFSR_NPP_", false, true, true); + find_cell_sr(libparser.ast, "$_DFFSR_PNN_", true, false, false); + find_cell_sr(libparser.ast, "$_DFFSR_PNP_", true, false, true); + find_cell_sr(libparser.ast, "$_DFFSR_PPN_", true, true, false); + find_cell_sr(libparser.ast, "$_DFFSR_PPP_", true, true, true); + bool keep_running = true; while (keep_running) { keep_running = false; @@ -327,7 +480,19 @@ struct DfflibmapPass : public Pass { keep_running |= expand_cellmap("$_DFF_*??_", "C"); keep_running |= expand_cellmap("$_DFF_?*?_", "R"); keep_running |= expand_cellmap("$_DFF_??*_", "DQ"); + keep_running |= expand_cellmap("$_DFFSR_*??_", "C"); + keep_running |= expand_cellmap("$_DFFSR_?*?_", "S"); + keep_running |= expand_cellmap("$_DFFSR_??*_", "R"); } + + map_sr_to_arst("$_DFFSR_NNN_", "$_DFF_NN0_"); + map_sr_to_arst("$_DFFSR_NNN_", "$_DFF_NN1_"); + map_sr_to_arst("$_DFFSR_NPP_", "$_DFF_NP0_"); + map_sr_to_arst("$_DFFSR_NPP_", "$_DFF_NP1_"); + map_sr_to_arst("$_DFFSR_PNN_", "$_DFF_PN0_"); + map_sr_to_arst("$_DFFSR_PNN_", "$_DFF_PN1_"); + map_sr_to_arst("$_DFFSR_PPP_", "$_DFF_PP0_"); + map_sr_to_arst("$_DFFSR_PPP_", "$_DFF_PP1_"); log(" final dff cell mappings:\n"); logmap_all(); |